國立中央大學教師履歷平台

期刊著作

• Design of a CMOS Self-Bootstrapping Rectifier with Latch-up Protection for Wireless Power Harvesting Systems
  Electronics (Switzerland), 15, 2, 2026-01-01
  [ power conversion efficiency (PCE),voltage conversion efficiency (VCE),wireless power transfer (WPT) ]

• Design and Implementation of a Decentralized Node-Level Battery Management System Chip Based on Deep Neural Network Algorithms
  Electronics (Switzerland), 15, 2, 2026-01-01
  [ decentralized BMS,deep learning,deep neural network,SOC ]

• Design of an Internal Asynchronous 11-Bit SAR ADC for Biomedical Wearable Application
  Electronics (Switzerland), 13, 17, 2024-09-01
  [ asynchronous,fully differential,register analog-to-digital converter,successive-approximation ]

• A Low-Power Continuous-Time Delta-Sigma Analogue-to-Digital Converter for the Neural Network Architecture of Battery State Estimation
  Electronics (Switzerland), 13, 17, 2024-09-01
  [ BGR,BMS,current reuse,deep learning,low-power ΔΣ ADC,neural network,SOC ]

• Cost-Efficient Approximation for Magnitude of a Complex Signal
  Electronics (Switzerland), 13, 13, 2024-07-01
  [ absolute value,automatic gain control,complex signal magnitude,triangle inequality ]

• A Design of Input-Decimation Technique for Recursive DFT/IDFT Algorithm
  IEEE Transactions on Circuits and Systems I: Regular Papers, 66, 12, 4713-4726, 2019-12-01
  [ constant multiplier , Discrete Fourier transform (DFT) , input-decimation , recursive DFT (RDFT) , recursive inverse DFT (RIDFT) ]

• A bootstrapped comparator-switched active rectifying circuit for wirelessly powered integrated miniaturized energy sensing systems
  Sensors, 19, 21, 2019-11-01
  [ AC-DC power converters , Energy harvesting , Implantable biomedical devices , Integrated circuits , Rectifying circuit , RFID tags , Wireless sensing systems ]

• Digitally Controlled AGC with Programmable-Gain Amplifier for DVB-T/H
  WSEAS Transactions on Electronics, 10, 109-113, 2019-01-01
  [ Multimedia Technology,Programmable-Gain Amplifier,Video Broadcasting ]

• FPGA demonstration for WLAN-OFDM baseband receiver
  Journal of Information Hiding and Multimedia Signal Processing, 9, 5, 1281-1292, 2018-09-01
  [ Bit error rate , Carrier frequency offset , Coordinate rotation digital computer , Error vector magnitude , Field-Programmable gate array , Orthogonal frequency division multiplexing , Signal-to-Noise ratio ]

• Finite-wordlength analysis of ADC and receiving filter for OFDM baseband transceiver
  Journal of Information Hiding and Multimedia Signal Processing, 9, 3, 567-576, 2018-05-01
  [ BER , Finite-wordlength analysis , OFDM , SNR , SQNR ]

• Data-rate-efficient CMOS modulator for wireless biomedical sensor network applications
  International Journal of Microwave and Wireless Technologies, 9, 1, 1-8, 2017-02-01
  [ BFSK modulator , Biomedical applications , Frequency synthesizer ]

• Multiplication of a Constant (2k ± 1) and Its Fast Hardware Implementation
  Journal of Signal Processing Systems, 82, 1, 41-53, 2016-01-01
  [ Booth algorithm , Carry-Lookahead Adder (CLA) , Constant multiplier , Hybrid Adder (HyA) , Ripple Carry Adder (RCA) ]

• A bandwidth-tunable bioamplifier with voltage-controlled symmetric pseudo-resistors
  Microelectronics Journal, 46, 6, 472-481, 2015-06-01
  [ Bioamplifier , Dynamic range , Linearity , Pseudo-resistor , Subthreshold region ]

• Efficient algorithm and fast hardware implementation for multiply-by-(1+2k)
  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E98A, 4, 966-974, 2015-04-01
  [ Booth algorithm , Carry-lookahead adder (CLA) , Constant multiplier , Hybrid adder (HyA) , Ripple carry adder (RCA) ]

• Design and implementation of power-efficient k-best MIMO detector for configurable antennas
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 22, 11, 2418-2422, 2014-11-01
  [ Antenna configurable , distributed K-best (DKB) , multiple-input multiple-output (MIMO) detection , successive interference cancellation (SIC). ]

• A CMOS multichannel electrical stimulation prototype system
  International Journal of Circuit Theory and Applications, 41, 3, 238-258, 2013-03-01
  [ CMOS VLSI , efficiency , functional electrical stimulation (FES) , inductive coupling , multichannel implant , prosthesis , transponder , wireless powering ]

• High throughput extended incremental coefficient-lookahead filters based adaptive decision feedback equalizer
  International Journal of Electrical Engineering, 19, 3, 115-126, 2012-06-01
  [ Adaptive decision feedback equalizer (ADFE) , Batch mode coefficients updating unit (BMCU) , Coefficient-lookahead ADFE , Incremental lookahead ]

• High throughput concurrent lookahead adaptive decision feedback equaliser
  IET Circuits, Devices and Systems, 6, 1, 52-62, 2012-01-01

• Tunable high resistance voltage-controlled pseudo-resistor with wide input voltage swing capability
  Electronics Letters, 47, 6, 377-378, 2011-03-17

• DHT-based OFDM system for passband transmission over frequency-selective channel
  IEEE Signal Processing Letters, 17, 8, 699-702, 2010-06-28
  [ Circulant matrix , Discrete Hartley transform (DHT) , Intercarrier coupling (ICC) , Orthogonal frequency-division multiplexing (OFDM) , Trigonometric transform ]

• Design of multicarrier OFDM modulator/demodulator based on discrete hartley transform
  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E93-A, 6, 1016-1023, 2010-01-01
  [ Discrete hartley transform (DHT) , Fast hartley transform (FHT) , Orthogonal frequency-division multiplexing (OFDM) ]

• Joint carrier synchronization and equalization algorithm for packet-based ofdm systems over the multipath fading channel
  IEEE Transactions on Vehicular Technology, 59, 1, 248-260, 2010-01-01
  [ Carrier frequency offset (CFO) , Digital phase-locked loop (DPLL) , Frequency-domain equalizer (FEQ) , Minimum mean square error (MMSE) , Signal-to-distortion ratio (SDR) ]

• Analysis and design of an efficient irreversible energy recovery logic in 0.18-μm CMOS
  IEEE Transactions on Circuits and Systems I: Regular Papers, 55, 9, 2595-2607, 2008-11-24
  [ Adiabatic logic , CMOS VLSI , Energy recovery , Irreversible , Low-power design ]

• Low-power and area-efficient PSK demodulator for wirelessly powered implantable command receivers
  Electronics Letters, 44, 14, 841-843, 2008-07-11

• A truly low-cost high-efficiency ASK demodulator based on self-sampling scheme for bioimplantable applications
  IEEE Transactions on Circuits and Systems I: Regular Papers, 55, 6, 1464-1477, 2008-07-01
  [ Amplitude-shift keying (ASK) demodulator , Artificial prostheses , Bioimplantable systems , Self-sampling ]

• Efficient hardware implementation of pipelined divider with a small lookup table
  WSEAS Transactions on Electronics, 4, 3, 56-62, 2007-03-01
  [ Approximation , Lookup table , Newton-Raphson algorithm , Pipelined divider , Taylor series expansion ]

• Efficient implementation of interpolation technique for symbol timing recovery in DVB-T receiver design
  WSEAS Transactions on Circuits and Systems, 6, 2, 215-221, 2007-02-01
  [ Cubic interpolation , Farrow structure , Interpolation technique , Non-synchronization sampling scheme , Symbol timing recovery ]

• A vlsi architecture design for dual-mode qam and vsb digital catv transceiver
  IEICE Transactions on Communications, E81-B, 12, 2351-2356, 1998-01-01

• Automatic gain control VLSI architecture for ADSL-1 cap system
  Journal of the Chinese Institute of Electrical Engineering, Transactions of the Chinese Institute of Engineers, Series E/Chung KuoTien Chi Kung Chieng Hsueh K'an, 3, 3, 261-268, 1996-08-01

研討會著作

• State of Charge Estimation and Circuit Implementation for Lithium Battery Based on the Elman Neural Network Algorithm
  98-102, 2024-01-01
  [ BMS,Deep Learning,ENN,Neural Chip,SOC ]

• A Clock Synchronization Technique for OFDM-based Communications
  2020-09-28
  

• Expandable Neuron Cell with Current-Steering DAC for Deep-Learning
  174-177, 2019-10-01
  [ Analog Neuron Model,Current-steering DAC,Deep-Learning ]

• A low-computation-cycle design of input-decimation technique for RIDFT algorithm
  2019-09-01
  [ Orthogonal frequency-division multiplexing (OFDM) , Recursive inverse discrete Fourier transform (RIDFT) ]

• A Low-Complexity Generalized Memory Addressing Scheme for Continuous-Flow Fast Fourier Transform
  502-505, 2018-09-11
  [ conflict-free , continuous-flow , fast fourier transform , in-place , memory-based ]

• A body sensor node SoC for ECG/EMG applications with compressed sensing and wireless powering
  2017-06-05
  

• Decision-directed beamforming and channel equalization algorithm for IEEE 802.11n OFDM systems
  220-223, 2016-08-16
  [ Beamforming , Channel Equalizaiton , FPGA , OFDM ]

• A voltage-mode DC-DC buck converter with digital PID controller
  2322-2326, 2016-01-13
  [ Buck Converter , DC-DC Converter , digital pulse-width modulator (DPWM) , PID Controller ]

• Design and implementation of the OFDM receiver for visible-light communication
  208-209, 2015-08-20
  [ Channel estimation , Frequency-domain analysis , Light emitting diodes , Mathematical model , OFDM , Receivers , Synchronization ]

• Design of digital baseband inner receiver for PLC system based on IEEE P1901 specification
  210-211, 2015-08-20
  [ Baseband , Channel estimation , Layout , Least squares approximations , OFDM , Receivers , Synchronization ]

• Low-complexity design of an 8×8 modulation configurable k-best MIMO detector
  1453-1457, 2015-01-01
  

• FPGA prototyping for CORDIC-based OFDM baseband receiver
  2014-03-13
  

• CORDIC-based OFDM baseband receiver design
  352-355, 2014-01-01
  

• Low-cost parallel FFT processors with conflict-free ROM-based twiddle factor generator for DVB-T2 applications
  1003-1006, 2013-12-01
  [ Butterfly Processing Element (PE) , Conflict-free ROM Addressing Scheme , Fast Fourier transform (FFT) , orthogonal , ROM , Twiddle Factors ]

• A sigma-delta modulator for bio-applications
  13-14, 2013-09-11
  

• An inductive biomedical communication processing chain
  2013-01-01
  [ CMOS , Harvesting , Implantable , Inductive , Wireless ]

• An impedance measurement analog front end for wirelessly bioimplantable applications
  172-175, 2012-12-01
  

• I/Q imbalance compensation and channel equalization algorithm for MISO-OFDM systems
  852-856, 2012-12-01
  

• Design of antenna-configurable MIMO detector with high speed sorting architectures
  843-847, 2012-12-01
  

• Adiabatic technique for biomedical applications
  584-589, 2012-12-01
  [ adiabatic , biomedical , circuits , CMOS , implantable , systems ]

• On investigation into A CMOS-process-based high-voltage driver applied to implantable microsystem
  2012-07-25
  

• Design of a neural recording amplifier with tunable pseudo resistors
  376-379, 2011-12-28
  

• CMOS comparator for medical imaging
  1060-1063, 2011-12-01
  [ CMOS , comparator , medical imaging , portable ]

• Self-powered integrated rectifier for wireless medical energy harvesting applications
  303-306, 2011-06-28
  

• A chopper stabilized front-end for neural recording applications with DC-drift suppressed amplifier
  77-80, 2009-12-01
  

• Cost efficient FEQ implementation for IEEE 802.16a OFDM transceiver
  154-157, 2009-12-01
  

• Joint carrier synchronization and equalization algorithm for OFDM systems - Loop-delay analysis and complexity consideration
  2009-12-01
  

• Cost-effective equalization for STBC MIMO/MISO OFDM systems over multipath fading channel
  2009-12-01
  

• 10Gbps decision feedback equalizer with dynamic lookahead decision loop
  1839-1842, 2009-10-26
  

• A low complexity real-valued kernel DHT-based OFDM modulator/demodulator design
  1529-1532, 2009-10-26
  

• A low power and variable-length FFT processor design for flexible MIMO OFDM systems
  705-708, 2009-10-26
  

• Joint carrier synchronization and equalization algorithm for OFDM systems - Closed-loop derivation
  2009-10-12
  

• On the DHT-based multicarrier tranceiver over multipath fading channel
  1662-1666, 2009-01-01
  

• A compact and low-power SRAM with improved read static noise margin
  546-549, 2008-12-26
  

• A 28mW OFDM baseband receiver chip for DVB-T/H with all digital synchronization
  351-354, 2008-12-26
  

• A differential difference amplifier for neural recording system with tunable low-frequency cutoff
  2008-12-01
  

• A pseudo-flash ADC for large-channel-volume biomedical sensing applications
  2008-12-01
  

• Efficient CMOS rectifier for inductively power-harvested implants
  2008-12-01
  

• A low-power area-efficient SRAM with enhanced read stability in 0.18-μm CMOS
  729-732, 2008-12-01
  

• An efficiency-enhanced CMOS voltage regulator module for bio-electronic implants
  121-124, 2008-12-01
  

• A 256-point dataflow scheduling 2×2 MIMO FFT/IFFT processor for IEEE 802.16 WMAN
  309-312, 2008-12-01
  

• Joint carrier synchronization and equalization for OFDM systems over multipath fading channel
  2008-12-01
  

• A miniaturized PSK demodulation device for short-range wireless neural prosthetic systems
  1565-1568, 2008-01-01
  [ Demodulator , Medical implants , Neural prosthesis , Phase-shift keying , Wireless monitoring ]

• High-speed, low cost parallel memory-based FFT processors for OFDM applications
  783-787, 2007-12-01
  [ Fast fourier transform(FFT) , Memory-based FFT , Multi-path delay commutator (MDC) FFT , Orthogonal frequency division multiplexing (OFDM) , Single-path delay feedback (SDF) FFT ]

• Analysis and design of an efficient complementary energy path adiabatic logic for low-power system applications
  247-250, 2007-12-01
  

• A fully integrated energy-aware baseband circuitry for next-generation retinal implants
  110-113, 2007-09-25
  

• An efficient micro-stimulator array using unitary-size DAC with adiabatic baseband scheme
  29-32, 2006-12-01
  

• Design and implementation of a monolithic programme-controlled system for retinal prosthesis
  351-354, 2006-12-01
  

• Design of self-sampling based ASK demodulator for implantable microsystem
  33-36, 2006-12-01
  

• Efficient implementation of interpolation technique for symbol timing recovery in DVB-T transceiver design
  427-431, 2006-12-01
  

• DHT-based frequency-domain equalizer for DMT systems
  1540-1543, 2005-12-01
  

• On-line step-size calculation using signal power estimation-tone grouping for frequency-domain equalizer of DMT-based systems
  685-688, 2004-12-01
  

• A hardware efficient 64-QAM low-IF transceiver baseband for broadband communications
  252-255, 2004-12-01
  

• A wide pull-in range fast acquisition hardware-sharing two-fold carrier recovery loop
  358-361, 2001-12-01
  

• A wide pull-in range fast acquisition hardware-sharing two-fold carrier recovery loop
  2001-01-01
  

• QAM/VSB dual mode equalizer design and implementation
  323-326, 1999-01-01
  

• VLSI design of dual-loop automatic gain control for dual-mode QAM/VSB CATV modem
  490-493, 1998-01-01
  

• New VSB modulation technique and shaping filter design
  312-315, 1996-01-01
  

專書

• Smart Innovation, Systems and Technologies
  388-396, 2018-01-01
  [ Equalization,I/Q mismatch,MIMO,OFDM,SISO,STBC ]

• Smart Innovation, Systems and Technologies
  229-236, 2017-01-01
  [ Antenna configurable,Distributed K-best (DKB),Multiple-input multiple-output (MIMO) detection,Shift multiplier ]

• The VLSI Handbook: Second Edition
  61.1-61.34, 2016-04-19
  

• Analog and VLSI Circuits
  337-372, 2009-01-01