國立中央大學教師履歷平台

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蔡宗漢

Tsai, Tsung-Han

han@ee.ncu.edu.tw

捐(受)贈收入

受贈收入-人工智慧系統晶片設計實驗室
1100101~1221231

其他補助

智慧電子整合人才培育計畫-4C電子聯盟中心104年度計畫
1040301~1050430

國科會計畫統計

適用於智慧眼鏡之邊緣運算之動態互動及視覺感知系統架構設計
1160801~1170731
適用於智慧眼鏡之邊緣運算之動態互動及視覺感知系統架構設計
1150801~1160731
適用於智慧眼鏡之邊緣運算之動態互動及視覺感知系統架構設計
1140801~1150731
基於多光譜影像融合技術之智慧辨識系統架構設計
1131101~1140930
[多光譜影像處理、影像切割、影像分類、影像超解析、無人機系統、精準農業 , Multispectral Image Processing, Image Segmentation, Image Classification, Image Super-Resolution, UAV Systems, Precision Agriculture]
應用人工智慧於室內影像感知之載具技術開發及硬體架構設計
1130801~1140731
[深度學習、電腦視覺、多任務學習、增量學習、遷移學習、深度估計、語意切割估計、物件偵測、物件辨識 , deep learning、computer vision、multi-task learning、incremental learning、 transfer learning、depth estimation、semantic segmentation、object detection、 image recognition、lightweight neural network]
智慧操控無人載具平台技術研發學研中心(4/4)
1130501~1140430
[水下無人載具 , UUV/USV]
應用人工智慧於室內影像感知之載具技術開發及硬體架構設計
1120801~1130731
[深度學習、電腦視覺、多任務學習、增量學習、遷移學習、深度估計、語意切割估計、物件偵測、物件辨識 , deep learning、computer vision、multi-task learning、incremental learning、 transfer learning、depth estimation、semantic segmentation、object detection、 image recognition、lightweight neural network]
運用人工智慧之深度估計於非平面投影技術開發及硬體架構設計
1120601~1130531
[深度估計、神經網路、硬體架構設計 , Depth Estimation,neural network,hardware architecture design]
智慧操控無人載具平台技術研發學研中心(3/4)
1120501~1130430
[水下無人載具 , UUV/USV]
應用人工智慧於室內影像感知之載具技術開發及硬體架構設計
1110801~1120731
[深度學習、電腦視覺、多任務學習、增量學習、遷移學習、深度估計、語意切割估計、物件偵測、物件辨識 , deep learning、computer vision、multi-task learning、incremental learning、 transfer learning、depth estimation、semantic segmentation、object detection、 image recognition、lightweight neural network]
智慧操控水下載具平台技術研發學研中心(2/4)
1110711~1120430
[水下無人載具 , UUV/USV]
應用於人體姿勢辨識與機器人之可重組深度神經網路引擎－子計畫四：應用可重組深度神經網路技術之姿勢與行為辨識系統
1100801~1110731
[人工智慧,機器學習,影像處理,深度學習,神經網路,姿勢偵測 , artificial intelligence,machine learning,image processing deep learning,neural network,human activity analysis]
應用於人體姿勢辨識與機器人之可重組深度神經網路引擎－子計畫四：應用可重組深度神經網路技術之姿勢與行為辨識系統
1090801~1100731
[人工智慧,機器學習,影像處理,深度學習,神經網路,姿勢偵測 , artificial intelligence,machine learning,image processing deep learning,neural network,human activity analysis]
輕量型神經網路晶圓缺陷偵測輔助系統
1090601~1100531
[強化資料分析,圓圖缺陷分類,神經網路,整合測試系統 , strengthen data analysis, wafer map defact classification, neural network, Integrated test system]
應用於人體姿勢辨識與機器人之可重組深度神經網路引擎－子計畫四：應用可重組深度神經網路技術之姿勢與行為辨識系統
1080801~1090731
[人工智慧,機器學習,影像處理,深度學習,神經網路,姿勢偵測 , artificial intelligence,machine learning,image processing deep learning,neural network,human activity analysis]
產學合作計畫-利用深度學習模型輔助晶片測試與除錯
1071101~1081031
[深度學習,遞歸神經網路,圖形處理器,深度壓縮 , Deep learning, Recurrent neural networks (RNN), Graphicprocessor unit (GPU), Deep compression]
應用於智慧城市環境輔助生活之影像偵知系統
1070801~1080731
嵌入視覺影像偵測之物聯網智慧家庭系統
1070101~1071231
[手勢辨識,行為辨識,嵌入式,軟硬整合 , Gesture identification,Activity Recognition,Embedded,hardware-software integration]
應用於智慧城市環境輔助生活之影像偵知系統
1060801~1070731
應用於智慧城市環境輔助生活之影像偵知系統
1050801~1060731
應用於智慧生活與照護之節能感測網路－總計畫暨子計畫一：結合物件辨識與視訊壓縮之編解碼器與其人機互動平台(3/3)
1040501~1050731

產學合作計畫統計

多重矩陣硬體平行運算高效能電路設計(1/2)
1140101~1141231
[深度學習,物件偵測,高層次綜合,平行運算 , Deep Learning,Object Detection,High Level Synthesis,Parallel computing]
基於語音與唇語識別產生文字輔助聽障之系統
1120815~1130814
[唇語判讀 , lip reading]
產學合作計畫－運用人工智慧之深度估計於非平面投影技術開發及硬體架構設計
1120601~1130531
[深度估計,神經網路,硬體架構設計 , Depth Estimation,neural network,hardware architecture design]
應用人工智慧於幀率提升之技術開發及硬體架構設計
1120101~1120630
[幀率提升,運動估計,神經網路,硬體架構設計 , Frame Rate Up-Conversion,Motion Estimation,neural network,hardware architecture design]
應用於MRI醫療影像清晰化之神經網路技術開發
1110601~1120731
[雜訊模糊,失焦模糊,晃動模糊 , Noise Blur,Defocus Blur,Motion Blur]
基於深度學習之人臉辨識與體溫檢測系統
1090801~1100731
[深度學習,人工智慧,嵌入式系統,溫度感測 , deep learning]
輕量型神經網路晶圓缺陷偵測輔助系統
1090601~1100531
[強化資料分析,圓圖缺陷分類,神經網路,整合測試系統 , strengthen data analysis,wafer map defact classification,neural network,Integrated test system]
情境調適裝置端模型演化演算法與晶片架構技術
1090101~1091231
[神經網路硬體加速器 , Neural network hardware accelerator]
2020臺灣消費電子國際研討會
1081203~1091231
[臺灣消費電子 , ICCE-TW]
基於物聯網和跌倒影像偵測之智慧照護警示服務：跌倒影像偵測與功能整合
1080301~1090630
[跌倒影像偵測 ]
利用深度學習模型輔助晶片測試與除錯
1071101~1081031
[深度學習,遞歸神經網路,圖形處理器,深度壓縮 , Deep learning, Recurrent neural networks (RNN), Graphicprocessor unit (GPU), Deep compression]
稻作蟲害監測和預警系統：飛蝨害蟲影像區分演算法的開發
1060101~1061231
結合影像鏡頭之人機互動系統
1050501~1071231
稻作蟲害監測和預警系統:飛蝨害蟲影像區分演算法的開發
1050101~1051231

期刊著作

Wafer map defect classification using deep learning framework with data augmentation on imbalance datasets
Eurasip Journal on Image and Video Processing, 2025, 1, 2025-12-01
[ Data augmentation,G2LGAN,Generative adversarial network,Wafer map defect classification ]
An SoC-based CNN accelerator for face recognition using HWCK data scheduling
Multimedia Systems, 31, 3, 2025-06-01
[ Deep learning,Deep neural network accelerator,Face recognition,Field-programmable gate array (FPGA),System-on-chip ]
An FPGA-Based Reconfigurable Convolutional Neural Network Accelerator for Tiny YOLO-V3
Circuits, Systems, and Signal Processing, 44, 5, 3388-3409, 2025-05-01
[ Convolutional neural network,FPGA,Reconfigurable hardware architecture,SoC design ]
Monocular-Based 3-D Human Pose Estimation With Refinement Block and Special Loss Function
IEEE Sensors Journal, 25, 3, 5679-5687, 2025-01-01
[ 3-D human pose estimation (HPE),deep convolution neural network (CNN),root-relative 3-D human pose,volumetric heatmap ]
Monocular Depth Estimation by Non-Local Decoder-Squeeze-and-Excitation Network With Adaptive Depth List
IEEE Open Journal of Intelligent Transportation Systems, 6, 1069-1083, 2025-01-01
[ CNNs,monocular depth estimation,non-local neural network,SE-Net,up-sampling recalibration ]
Design and implementation of deep learning-based object detection and tracking system
Integration, the VLSI Journal, 99, 2024-11-01
[ DPU,FPGA,Object detection,Visual tracking,Vitis AI ]
FPGA-based control system for real-time driving of UHD Micro-LED display with color calibration
Integration, the VLSI Journal, 98, 2024-09-01
[ Demura,FPGA,Micro-LED,Non-uniformity compensation,Real-time control,UHD video ]
A deep neural network for hand gesture recognition from RGB image in complex background
Signal, Image and Video Processing, 18, Suppl 1, 861-872, 2024-08-01
[ Attention model,Deep neural network,Depthwise separable convolution,Hand gesture recognition,Hand segmentation,Human–computer interaction ]
GMM-Based Speaker Verification System with Hardware MFCC in SoC Design
Multimedia Tools and Applications, 83, 19, 56991-57010, 2024-06-01
[ FPGA,Gaussian Mixture Model,Hidden Markov Model,Mel-frequency cepstral coefficients,Speaker verification ]
A High-Performance Neural Network SoC for End-to-End Speaker Verification
IEEE Access, 12, 165482-165496, 2024-01-01
[ RISC-V,speaker identification,Speaker verification (SV),system-on-chip (SoC),x-vector ]
Hardware architecture design for real-time SIFT extraction with reduced memory usage
Multimedia Tools and Applications, 83, 2, 6297-6317, 2024-01-01
[ Gaussian pyramid,Key-point,Low memory VLSI design,Object recognition,Real-time ]
A real-time surveillance system with multi-object tracking
Multidimensional Systems and Signal Processing, 34, 4, 767-791, 2023-12-01
[ Background model,Background subtraction,Occlusion,Surveillance system,Tracking ]
Speech densely connected convolutional networks for small-footprint keyword spotting
Multimedia Tools and Applications, 82, 25, 39119-39137, 2023-10-01
[ DenseNet,Depthwise separable convolution,Group convolution,Keyword spotting,SENet ]
DS-GAU: Dual-sequences gated attention unit architecture for text-independent speaker verification
, 13, 2023-09-15
[ Attention mechanism,DNN,DS-GAU x-vectors,Speaker verification,TDNN,TDNN-GRU,x-vectors ]
A tracking system with multiple region background subtraction algorithm for night scene
International Journal of Information Technology (Singapore), 15, 6, 3169-3179, 2023-08-01
[ Background modeling,Foreground detection,Night scene,Surveillance,Tracking ]
A one-shot face detection and recognition using deep learning method for access control system
Signal, Image and Video Processing, 17, 4, 1571-1579, 2023-06-01
[ Artificial intelligence,Deep neural network,Face detection,Face recognition,Machine learning ]
BiSeNet V3: Bilateral segmentation network with coordinate attention for real-time semantic segmentation
Neurocomputing, 532, 33-42, 2023-05-01
[ Deep learning,Real-time processing,Semantic segmentation ]
Learning with Sharing: An Edge-Optimized Incremental Learning Method for Deep Neural Networks
IEEE Transactions on Emerging Topics in Computing, 11, 2, 461-473, 2023-04-01
[ deep neural networks,energy-efficient learning,Incremental learning,learning on-chip,network sharing ]
Joint Masked Face Recognition and Temperature Measurement System Using Convolutional Neural Networks
Sensors, 23, 6, 2023-03-07
[ deep learning,embedded system,face detection,masked face recognition ]
An Efficient Incremental Learning Algorithm for Sound Classification
IEEE Multimedia, 30, 1, 84-90, 2023-01-01
Hardware Architecture Design for Hand Gesture Recognition System on FPGA
IEEE Access, 11, 51767-51776, 2023-01-01
[ attention model,depthwise separable convolution,field-programmable gate array (FPGA),Hand gesture recognition,hardware accelerator ]
An On-Chip Fully Connected Neural Network Training Hardware Accelerator Based on Brain Float Point and Sparsity Awareness
IEEE Open Journal of Circuits and Systems, 4, 85-98, 2023-01-01
[ energy efficient,Fully connected layers,learning on edge,on-chip training,optimized memory access,sparsity ]
Automatic Optical Inspection System for Wire Color Sequence Detection
Sensors, 22, 15, 2022-08-01
[ automated optical inspection,color recognition,computer vision,surveillance system ]
Refined U-net: A new semantic technique on hand segmentation
Neurocomputing, 495, 1-10, 2022-07-21
A single-stage face detection and face recognition deep neural network based on feature pyramid and triplet loss
IET Image Processing, 16, 8, 2148-2156, 2022-06-01
Hardware design for blind source separation using fast time-frequency mask technique
Integration, the VLSI Journal, 82, 67-77, 2022-01-01
Design and implementation of filterbank for MPEG-2/4 AAC system
Integration, the VLSI Journal, 82, 155-162, 2022-01-01
Architecture design and vlsi implementation of 3d hand gesture recognition system†
Sensors, 21, 20, 2021-10-02
[ ASIC,FPGA,Hand gesture recognition,Object labeling,SAD matching,VLSI ]
Memory Access Optimization for On-Chip Transfer Learning
IEEE Transactions on Circuits and Systems I: Regular Papers, 68, 4, 1507-1519, 2021-04-01
[ deep neural networks,fully connected layers,on-chip training,Optimized memory access,transfer learning ]
A robust tracking algorithm for a human-following mobile robot
IET Image Processing, 15, 3, 786-796, 2021-02-01
VLSI Implementation of Multi-channel ECG Lossless Compression System
IEEE Transactions on Circuits and Systems II: Express Briefs, 2021-01-01
[ Adaptive systems,Circuits and systems,ECG Compression.,Electrocardiography,Golomb Rice Code,Hardware,Hardware,Mathematical model,Prediction algorithms,Very large scale integration ]
Self-Defined Text-Dependent Wake-Up-Words Speaker Recognition System
IEEE Access, 9, 138668-138676, 2021-01-01
[ customized wake-up word,Gaussian mixture model,hidden Markov model,mel-frequency cepstral coefficients,real-time operation,Speaker recognition ]
VLSI Implementation of Lossless ECG Compression Algorithm for Low Power Devices
IEEE Transactions on Circuits and Systems II: Express Briefs, 67, 12, 3317-3321, 2020-12-01
[ adaptive linear prediction,ECG compression,Golomb rice coding,low power design,VLSI ]
A Light-Weight Neural Network for Wafer Map Classification Based on Data Augmentation
IEEE Transactions on Semiconductor Manufacturing, 33, 4, 663-672, 2020-11-01
[ data augmentation,Deep learning,depthwise separable convolution,wafer defects ]
Efficient lossless compression scheme for multi-channel ECG signal processing
Biomedical Signal Processing and Control, 59, 2020-05-01
[ Golomb-Rice codec,Linear prediction,Lossless compression,Multi-channel ECG signal,Telemedicine ]
Design of hand gesture recognition system for human-computer interaction
Multimedia Tools and Applications, 79, 9-10, 5989-6007, 2020-03-01
[ Convex hull , Hand gesture recognition , Human-computer interaction , Labeling , Skin color segmentation ]
Design of vision-based indoor positioning based on embedded system
IET Image Processing, 14, 3, 423-430, 2020-02-28
Design and Implementation on Intelligent Homecare Appliance System
IEEE Consumer Electronics Magazine, 9, 1, 16-21, 2020-01-01
Design of Wireless Vision Sensor Network for Smart Home
IEEE Access, 8, 60455-60467, 2020-01-01
[ Background segmentation , intelligent surveillance system , video surveillance system , wireless sensor network , wireless vision sensor network ]
Implementation of Fall Detection System Based on 3D Skeleton for Deep Learning Technique
IEEE Access, 7, 153049-153059, 2019-01-01
[ 3D skeleton , action recognition , deep learning , embedded system , fall detection , image processing ]
A novel method for 2D-to-3D video conversion based on boundary information
Eurasip Journal on Image and Video Processing, 2018, 1, 2018-12-01
[ 2D to 3D conversion , 3D video , Depth map , DIBR , Foreground segmentation , Superpixel ]
Single-Chip Design for Intelligent Surveillance System
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 26, 9, 1637-1646, 2018-09-01
[ Application-specified integrated circuit (ASIC) , foreground detection , object labeling , object tracking , smart camera ]
An Efficient ECG Lossless Compression System for Embedded Platforms with Telemedicine Applications
IEEE Access, 6, 42207-42215, 2018-07-21
[ Electro-cardiogram (ECG) , Golomb-Rice coding , healthcare monitoring , lossless data compression , telemedicine , wearable devices ]
Fast mode decision method based on edge feature for HEVC inter-prediction
IET Image Processing, 12, 5, 644-651, 2018-05-01
Hardware/software co-design and VLSI implementation for the intelligent surveillance system
IEEE Sensors Journal, 17, 18, 6077-6089, 2017-09-15
[ Foreground detection , object tracking , system-on-a-programmable-chip ]
A Hardware/Software Co-design of High Efficiency AAC Audio Decoder
Journal of Signal Processing Systems, 88, 3, 345-356, 2017-09-01
[ Audio compression , codec , HE-AAC , IP , low power , SOPC , VLSI ]
Monocular vision-based depth map extraction method for 2D to 3D video conversion
Eurasip Journal on Image and Video Processing, 2016, 1, 2016-12-01
[ 2D to 3D conversion , 3D video , Depth map , Foreground segmentation , Motion estimation ]
Accurate frame rate up-conversion for advanced visual quality
IEEE Transactions on Broadcasting, 62, 2, 426-435, 2016-06-01
[ bi-directional motion estimation , Frame rate up-conversion , noise minimization , unidirectional motion estimation ]
A SoC integrating ADC and 2DDWT for video/image processing
IEICE Transactions on Electronics, E99C, 3, 415-426, 2016-03-01
[ ADC , Discrete wavelet transform , Pipeline ]
WHDVI: A wireless high definition video interface technique for digital home
Integration, the VLSI Journal, 53, 138-144, 2016-03-01
[ Digital home , Embedded compression , Wireless transmission ]
Design and implementation of a joint data compression and digital watermarking system in an MPEG-2 video encoder
Journal of Signal Processing Systems, 74, 2, 203-220, 2014-02-01
[ Blind detection technique , Intellectual property , Watermarking system , Watermarking very large scale integrated circuits ]
Content-based singer classification on compressed domain audio data
Multimedia Tools and Applications, 74, 4, 1489-1509, 2014-01-01
[ GMM , MDCT , MFCC , MP3 ]
Hybrid frame rate upconversion method based on motion vector mapping
IEEE Transactions on Circuits and Systems for Video Technology, 23, 11, 1901-1910, 2013-11-20
[ Bidirectional motion vector mapping , frame rate upconversion (FRUC) , hybrid , iterative motion vector assignment , low computation complexity , noise minimization , resolution adaptive cost evaluation ]
Algorithm and architecture design of human-machine interaction in foreground object detection with dynamic scene
IEEE Transactions on Circuits and Systems for Video Technology, 23, 1, 15-29, 2013-01-18
[ Dynamic scene , foreground object detection , human-machine interaction , system-on-chip (SoC) , very large-scale integration (VLSI) ]
Visual hand gesture segmentation using three-phase model tracking technique for real-time gesture interpretation system
Journal of Information Hiding and Multimedia Signal Processing, 3, 2, 122-134, 2012-12-21
[ Hand gesture segmentation , Hausdorff distance , Humancomputer interaction , Model track , Motion analysis ]
Design and implementation of efficient video stabilization engine using maximum a posteriori estimation and motion energy smoothing approach
IEEE Transactions on Circuits and Systems for Video Technology, 22, 6, 817-830, 2012-06-13
[ Global motion estimation , hardware architecture , motion energy computation , video stabilization ]
High visual quality particle based frame rate up conversion with acceleration assisted motion trajectory calibration
IEEE/OSA Journal of Display Technology, 8, 6, 341-351, 2012-05-22
[ Acceleration-based motion trajectory prediction , bidirectional motion estimation , frame rate up conversion , liquid crystal displays (LCDs) , pixel-based frame rate up conversion , unidirectional motion estimation ]
Exploring contextual redundancy in improving object-based video coding for video sensor networks surveillance
IEEE Transactions on Multimedia, 14, 3 PART 2, 669-682, 2012-05-22
[ Contextual redundancy coding , intelligent video surveillance , object-based video coding , operational rate-distortion theory , visual sensor network ]
High efficiency architecture design of real-time QFHD for H.264/AVC fast block motion estimation
IEEE Transactions on Circuits and Systems for Video Technology, 21, 11, 1646-1658, 2011-11-01
[ Fast block matching algorithm , H264 , high efficiency architecture , motion estimation , QFHD ]
A novel design of CAVLC decoder with low power and high throughput considerations
IEEE Transactions on Circuits and Systems for Video Technology, 21, 3, 311-319, 2011-03-01
[ CAVLC decoder , H.264 , low power , multi symbol ]
Text-video completion using structure repair and texture propagation
IEEE Transactions on Multimedia, 13, 1, 29-39, 2011-02-01
[ Spatio-temporal consistency , structure-texture completion , text removal , video completion ]
Guest editorial: Special issue on computing architectures for real-time video/image analysis
Journal of Signal Processing Systems, 62, 1, 1-3, 2011-01-01
System level design and implementation for region-of-interest segmentation
Journal of Signal Processing Systems, 62, 1, 97-112, 2011-01-01
[ DSP , Edge detection , Motion detection , Real-time , Region-of-interest , System level design ]
Design of real-time self-frame-rate-control foreground detection for multiple camera surveillance system
IEICE Transactions on Information and Systems, E94-D, 12, 2513-2522, 2011-01-01
[ DSP,Foreground detection,Frame rate control,Multi-camera,Surveillance ]
A novel MPEG audio degrouping algorithm and its architecture design
Eurasip Journal on Audio, Speech, and Music Processing, 2010, 2010-12-01
Motion intensity and direction distribution similarity measure for accelerating sports video retrieval
International Journal of Electrical Engineering, 17, 6, 405-412, 2010-12-01
[ Motion intensity , Similarity measure , Video retrieval ]
A 6.4 Gbit/s embedded compression codec for memory-efficient applications on advanced-HD specification
IEEE Transactions on Circuits and Systems for Video Technology, 20, 10, 1277-1291, 2010-10-01
[ Context-modeling , embedded compression (EC) , lossless/near-lossless compression , rate control , very large scale integration (VLSI) architecture ]
A videotext in picture display system with embedded videotext extraction on a dual-core platform
IEEE Transactions on Consumer Electronics, 56, 3, 1661-1669, 2010-08-01
[ display system , dual-core , real-time processing , videotext extraction ]
Segregation to mixing in wet granular matter under vibration
Chemical Engineering Science, 65, 3, 1109-1116, 2010-01-01
[ Liquid bridge force , Liquid content , Liquid viscosity , Segregation , Vibrated bed , Wet granular matter ]
Design and analysis of high-throughput lossless image compression engine using VLSI-oriented FELICS algorithm
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 18, 1, 39-52, 2010-01-01
[ Full high-definition (HD) 1080p , Lossless compression , Parallelism , VLSI architecture ]
Design and implementation for deinterlacing using the edge-based correlation adaptive method
Journal of Electronic Imaging, 18, 1, 2009-12-01
Utilization of low-complexity and drift-reduction architecture in downscaling transcoder
Journal of Electronic Imaging, 18, 3, 2009-12-01
High efficient H.264/AVC deblocking filter architecture for real-time QFHD
IEEE Transactions on Consumer Electronics, 55, 4, 2248-2256, 2009-11-01
[ Deblocking filter , H.264/AVC , Memory efficient , QFHD ]
2DVTE: A two-directional videotext extractor for rapid and elaborate design
Pattern Recognition, 42, 7, 1496-1510, 2009-07-01
[ Edge detection , Extraction , Localization , Seed-filling , Text detection ]
Highly efficient CAVLC encoder for MPEG-4 AVC/H.264
IET Circuits, Devices and Systems, 3, 3, 116-124, 2009-06-29
A low cost foreground object detection architecture design with Multi-model Background Maintenance algorithm
International Journal of Electrical Engineering, 16, 3, 241-250, 2009-06-01
[ Foreground object detection , Gaussian density function , MBM ]
Low-power system design for MPEG-2/4 AAC audio decoder using pure ASIC approach
IEEE Transactions on Circuits and Systems I: Regular Papers, 56, 1, 144-155, 2009-02-26
[ AAC , Advanced audio coding (AAC) , Audio , Decoder , Low power , System ]
Low-power memory-reduced traceback MAP decoding for double-binary convolutional turbo decoder
IEEE Transactions on Circuits and Systems I: Regular Papers, 56, 5, 1005-1016, 2009-01-01
[ Low-power design,Maximum a posteriori (MAP) algorithm,Turbo decoder ]
A low-latency multi-layer prefix grouping technique for parallel huffman decoding of multimedia standards
Journal of Signal Processing Systems, 53, 3, 323-333, 2008-12-01
[ Huffman coding , Multimedia , Parallel processing , Prefix grouping , VLIW DSP processor ]
VLSI design for MPEG-4 shape coding using a contour-based binary motion estimation algorithm
IET Circuits, Devices and Systems, 2, 5, 429-438, 2008-11-20
Video transcoder in DCT-domain spatial resolution reduction using low-complexity motion vector refinement algorithm
Eurasip Journal on Advances in Signal Processing, 2008, 2008-11-17
An efficient design for Motion-JPEG2000 system in real-time video encoding
Journal of Circuits, Systems and Computers, 17, 4, 597-610, 2008-08-01
[ DSP , EBCOT , JPEG2000 , Motion-JPEG2000 ]
VLIW-aware software optimization of AAC decoder on parallel architecture core DSP (PACDSP) processor
IEEE Transactions on Consumer Electronics, 54, 2, 933-939, 2008-05-01
[ AAC decoder , PACDSP processor , Parallel processing , Software optimization ]
Platform-based design for the low complexity and high performance De-interlacing system
IEICE Transactions on Information and Systems, E91-D, 12, 2784-2793, 2008-01-01
[ De-interlace , De-interlacing , Inter-field interpolation method , Intra-field interpolation method , Motion adaptive method , Motion compensation method ]
Multi-standard audio decoder with platform based SoC HW/SW co-design approach
International Journal of Electrical Engineering, 14, 3, 247-254, 2007-06-01
[ Accelerator,Audio decoder,Co-design,Platform,SoC ]
Efficient implementation of interpolation technique for symbol timing recovery in DVB-T receiver design
WSEAS Transactions on Circuits and Systems, 6, 2, 215-221, 2007-02-01
[ Cubic interpolation , Farrow structure , Interpolation technique , Non-synchronization sampling scheme , Symbol timing recovery ]
A configurable common filterbank processor for multi-standard Audio decoder
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E90-A, 9, 1913-1923, 2007-01-01
[ Accelerator,Audio decoder,Filterbank,Mobile phone,Multi-standard ]
A novel 3-D predict hexagon search algorithm for fast block motion estimation on H.264 video coding
IEEE Transactions on Circuits and Systems for Video Technology, 16, 12, 1542-1549, 2006-12-01
[ Fast block matching algorithm , H.264 , Motion estimation ]
Design of a FFT/IFFT soft IP generator using on OFDM communication system
WSEAS Transactions on Circuits and Systems, 5, 8, 1173-1180, 2006-08-01
[ FFT , Generator , Intellectual property , OFDM , Pipeline implementation ]
Fast decomposition of filterbanks for the state-of-the-art audio coding
IEEE Signal Processing Letters, 12, 10, 693-696, 2005-10-01
[ Audio coding , Fast algorithm ]
A hardware/software co-design of MP3 audio decoder
Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, 41, 1, 111-127, 2005-08-01
[ ASIC , Co-Design , DSP , Filterbank , IMDCT , MP3 , MPEG , VLSI ]
A hardware/software co-design case study on MPEG AAC audio decoder
International Journal of Embedded Systems, 1, 1-2, 125-133, 2005-01-01
[ AAC , ARM , audio , co-design , hardware , MPEG , software ]
A low complexity design of psycho-acoustic model for MPEG-2/4 advanced audio coding
IEEE Transactions on Consumer Electronics, 50, 4, 1209-1217, 2004-11-01
[ Audio encoder , Low complexity , MPEG Advanced Audio Coding , Psycho-acoustic Model ]
A fast binary motion estimation algorithm for MPEG-4 shape coding
IEEE Transactions on Circuits and Systems for Video Technology, 14, 6, 908-913, 2004-06-01
[ Binary motion estimation (BME) , MPEG-4 , Shape coding , Video object plane (VOP) ]
Low power and cost effective VLSI design for an MP3 audio decoder using an optimised synthesis-subband approach
IEE Proceedings: Computers and Digital Techniques, 151, 3, 245-251, 2004-05-01
VLSI design for embedded digital watermarking JPEG encoder based on digital camera system
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E87-A, 7, 1772-1780, 2004-01-01
[ Digital still camera (DSC) , Discrete cosine transform (DCT) , Joint photographic experts group (GPEG) , Watermark ]
Architecture design for MPEG-2 AAC filterbank decoder using modified regressive method
Proceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing, 3, 3216-3219, 2002-01-01
A Cost-Effective Design for MPEG-2 Audio Decoder with Embedded RISC Core
Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, 29, 3, 255-265, 2001-01-01
[ Degrouping , MPEG-2 , Multichannel , RISC , Synthesis filterbank ]
A novel architecture of inverse quantization and multichannel processing for mpeg-2 audio decoding
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 47, 1, 75-78, 2000-12-01
[ Inverse quantization , MPEG-2 , Multichannel processing , Synthesis subband ]
Cost-effective design for MPEG2 audio decoder with embedded RISC core
, 361-369, 1999-12-01
System level integration methodology for MPEG-2 audio decoder with embedded RISC core
International Symposium on VLSI Technology, Systems, and Applications, Proceedings, 46-49, 1999-01-01
Cost effective architecture design of inverse quantization and multichannel processing for MPEG-2 audio decoding
Proceedings - IEEE International Symposium on Circuits and Systems, 3, 1999-01-01
VLSI implementation of visual block pattern truncation coding
IEEE Transactions on Consumer Electronics, 44, 3, 490-499, 1998-12-01
[ Block truncation coding , Visual block pattern truncation coding , Visual pattern image coding , VLSI implementation ]
A novel MPEG audio degrouping algorithm and its architecture design
IEEE Transactions on Signal Processing, 46, 5, 1998-12-01
A novel MPEG audio degrouping algorithm and its architecture design
IEEE Transactions on Signal Processing, 46, 3, 1998-12-01
Simple and low-cost MPEG audio degrouping algorithm
International Conference on Signal Processing Proceedings, ICSP, 2, 1154-1157, 1998-12-01
A novel MPEG-2 audio decoder with efficient data arrangement and memory configuration
IEEE Transactions on Consumer Electronics, 43, 3, 598-604, 1997-12-01
An I-phone system design and implementation with a portable speech coding coprocessor
IEEE Transactions on Consumer Electronics, 43, 4, 1262-1269, 1997-12-01
An MPEG audio decoder chip
IEEE Transactions on Consumer Electronics, 41, 1, 89-96, 1995-01-01

研討會著作

Design on Small-Footprint x-Vector-Based End-to-End Speaker Verification System
2025-01-01
[ deep learning,edge devices,identity recognition,Speaker verification,x-vector ]
An FPGA based SoC Accelerator with Convolutional Neural Networks for Small-Print Keyword Spotting
9-10, 2025-01-01
[ convolutional neural network,FPGA,keyword spotting,SoC design ]
Hardware Design on Face Recognition System by Deep Neural Network for Access Control System
2024-01-01
A Transposed Hand Silhouette Interaction System Using Deep Neural Network
382-386, 2024-01-01
[ deep learning,hand segmentation,image processing,interactive system,real-time ]
Equipped with Monocular Depth Estimation and Intelligent Wake-Up Vision Based Tracking System for a Human-Following Mobile Robot
2024-01-01
[ CNN tracker,Human-following robot,Intelligent Wake-up,Monocular Depth Estimation,Tracking System ]
An SoC Based Hardware Accelerator for Blind Assistive System
2024-01-01
[ blind assistive system,convolutional neural network,FPGA,SoC design ]
Light-Weight Monocular Depth Estimation by Non-Local Decoder-Squeeze-and-Excitation Network
105-106, 2024-01-01
[ CNNs,Light-weight depth estimation,Monocular Depth Estimation,Non-local Decoder-Squeeze-and-Excitation ]
An Adaptive Foreground Segmentation based on Texture and Intensity Features
29-30, 2024-01-01
VLSI Design of Programmable Bootstrapping for Torus Fully Homomorphic Encryption
2024-01-01
[ Fully Homomorphic Encryption over the Torus,Programmable Bootstrapping,VLSI Architecture/Design ]
SR-Latch-Based 12T SRAM Cell Design for Low Power Application
2024-01-01
Video-Based Online Interactive System Using CNN Segmentation Method
480-484, 2023-01-01
[ CNN,human segmentation,image processing,interactive system,internet ]
Contour Based Hand Segmentation Using Deep Convolutional Neural Networks
271-272, 2023-01-01
[ Convolutional Neural Networks,Hand Segmentation,Machine Learning ]
NL-DSE: Non-Local Neural Network with Decoder-Squeeze-and-Excitation for Monocular Depth Estimation
2023-01-01
[ CNNs,encoder-decoder,monocular depth estimation,SE-Net,up-sampling recalibration ]
3D Hand Mesh Reconstruction from Monocular Image by using Intermediate Representations
565-566, 2023-01-01
A Reconfigurable Hardware Architecture for Graph Convolution Network in Action Recognition
1075-1078, 2023-01-01
[ accelerator,FPGA,graph convolutional neural network,hardware,reconfigurable architecture ]
Neural Network-Based Low-Frequency Perception Enhancement Used in Biomedical Hearing Applications
2023-01-01
[ deep neural networks,Nonlinear device,Phase vocoder,Stationary-transient source separation,Virtual bass system ]
Motion Artifact Correction in MRI using GAN-Based Channel Attention Transformer
2023-01-01
[ Generative Adversarial Network,Motion Artifact,Self-Attention,Transformer ]
An Area-Efficient and High Throughput Hardware Implementation of Exponent Function
3369-3372, 2022-01-01
[ Digital design,Exponent function,FPGA,Hardware accelerator,VLSI ]
A Skeleton-based Dynamic Hand Gesture Recognition for Home Appliance Control System
3265-3268, 2022-01-01
[ computer vision,convolutional neural networks,deep learning,dynamic hand gesture recognition,home appliance application,skeleton ]
Low Parameter and FLOPs1Speech Densely Connected Convolutional Networks for Keyword Spotting
271-272, 2022-01-01
Customized Speaker Verification System with Noise-Cancellation using Blind Source Separation
473-474, 2022-01-01
Live Demonstration: Home Appliance Control System with Dynamic Hand Gesture Recognition base on 3D Hand Skeletons
2022-01-01
[ convolutional neural networks,dynamic hand gesture recognition,home appliance application,skeleton ]
An Edge-Optimized Incremental Learning Algorithm For Audio Classification
2022-01-01
Secure Surveillance System based on Wireless Sensor Network for Home-Care Applications
435-436, 2022-01-01
[ Surveillance system,Wireless vision sensor network ]
An Efficient and Fast Softmax Hardware Architecture (EFSHA) for Deep Neural Networks
2021-06-06
[ area-efficient implementation,deep neural networks,FPGA,learning on-chip,Softmax layer ]
Defect Detection on Wafer Map Using Efficient Convolutional Neural Network
2021-01-01
Knee Lift Detection using Convolutional Neural Network Method with FPGA Hardware Design
2021-01-01
Reduced Model Size Deep Convolutional Neural Networks for Small-Footprint Keyword Spotting
2021-01-01
[ deep learning,DenseNet,group convolution,keyword spotting,SENet ]
General Chairs
2021-01-01
Live demonstration: Real-time multi-hand segmentation on exhibition
2021-01-01
[ Hand segmentation,Skin color,TX2 ]
Live demonstration: Intelligent voice wake-up human-following robot
2021-01-01
[ CNN tracker,Person following robot,Stereo vision,Tracking system ]
A Text-Independent Speaker Verification for SdSV Challenge 2020
459-461, 2020-10-30
[ SdSV,speaker recognition,x-vector ]
A CNN Accelerator on FPGA using Binary Weight Networks
2020-09-28
The 38th IEEE Conference on International Conference on Consumer Electronics (ICCE)
?, 2020-01-04
[ failure analysis , feature extraction , image classification , integrated circuit IC design process , test process , production cost , wafer map defect recognition , failure type , error point , depthwise separable convolutions , real-world wafer map dataset , test set , wafer map defect classification design , integrated circuit manufacture , production engineering computing , semiconductor device manufacture , semiconductor technology ]
Live demonstration: Vision-based real-time fall detection system on embedded system
2020-01-01
[ CNN,Fall detection,Neural compute stick2,Raspberry pi ]
Wafer map defect classification with depthwise separable convolutions
2020-01-01
Customized Wake-Up Word with Key Word Spotting using Convolutional Neural Network
136-137, 2019-10-01
[ convolutional neural network , customized wake-up-word , gaussian mixture model , hidden markov model , mel-frequency cepstral coefficients ]
Enhancing the data analysis in IC testing by machine learning techniques
183-186, 2019-10-01
Implementation of fall detection system based on 3D skeleton for deep learning technique
389-390, 2019-10-01
[ CNN , Embedding system , Fall detection ]
Design of fall detection system using computer vision technique
33-37, 2019-07-26
[ Embedding system , Fall detection , Surveillance system ]
Efficient Lossless Compression Scheme for Multi-channel ECG Signal
1289-1292, 2019-05-01
[ Golomb-Rice codec , linear prediction , Lossless compression , multi-channel ECG signal , telemedicine ]
Implementation of FPGA-based Accelerator for Deep Neural Networks
2019-04-01
[ CNN , DNN , FPGA , hardware accelerator , low utilization ]
A Sketch Classifier Technique with Deep Learning Models Realized in an Embedded System
2019-04-01
[ Deep Learning , Embedded System , Neural Network , Sketch Classification ]
A Real-time Tracking Algorithm for Human Following Mobile Robot
78-79, 2019-02-22
[ Binocular camera , Component , Human-following , Mobile robot , Visual tracking ]
Implementation of 3D Hand Gesture Recognition System using FPGA
131-132, 2019-02-22
[ FPGA , Hand gesture recognition , Object labeling , SAD matching , VLSI ]
VLSI Implementation of ECG Compression Algorithm Using Golomb Rice Coding
2018-08-27
The ROI of rice planthopper by image processing
126-129, 2017-07-21
[ Image processing , Rice planthopper (RPH) , ROI ]
Design and implementation of a 3D hand gesture architecture system under complicated environment
2017-06-05
Implementation of intelligent home appliances based on IoT
146-148, 2017-01-03
[ bluetooth , foreground segmentation , intelligent home appliances , IoT , object labeling ]
Vision based indoor positioning for intelligent buildings
2016-08-09
[ direct linear transform , foreground detection , indoor position , vision ]
Design and implementation of blind source separation for noise reduction
2016-07-25
Dynamic scene depth generation method for 2D to 3D video conversion
340-341, 2015-08-20
[ Dynamics , Feature extraction , Human computer interaction , Motion estimation , Three-dimensional displays , Tracking , Video sequences ]
Embedded virtual mouse system by using hand gesture recognition
352-353, 2015-08-20
[ Gesture recognition , Human computer interaction , Image color analysis , Labeling , Mice , Motion detection , Skin ]
A high performance object tracking technique with an adaptive search method in surveillance system
353-356, 2015-02-05
[ object grouping , object tracking , surveillance system ]
Design for an intelligent surveillance system based on system-on-a-programmable-chip platform
2049-2052, 2015-01-01
[ foreground detection , object tracking , System-on-a-Programmable-Chip ]
Semi-automatic 2D to 3D video conversion based on relative velocity Estimation
248-249, 2014-01-01
A speech enhancement system using binary mask approach and spectral subtraction method
1065-1068, 2014-01-01
[ binary mask approach,blind source separation,spectral subtraction,speech enhancement,STFT ]
Memory-efficient scalable video encoder architecture for multi-source digital home environment
685-688, 2013-09-09
[ image compression , Lossless compression , quality driven bit plane sequencer , size scalability , SNR scalability , video compression ]
A high performance foreground detection algorithm for night scenes
284-288, 2013-01-01
[ Background modeling , Foreground detection , Human machine ]
Semi-automatic depth map extraction method for stereo video conversion
340-343, 2012-12-01
[ 2d to 3d conversion , Depth estimation , Foreground detection ]
Video stabilization with local rotational motion model
551-554, 2012-12-01
[ global motion estimation , local rotational motion , video stabilization ]
Hardware design of the scalable video encoder for the multi-source digital home environment
658-662, 2012-12-01
[ image compression , Lossless compression , quality driven bit plane sequencer , size scalability , SNR scalability , video compression ]
A fast and effective algorithm for significance coding using zero block coding technology
33-36, 2011-12-01
[ bitplane coding , significance coding , zero block coding ]
A low complexity scalable video compressor for multiple source digit home set-top box
37-40, 2011-12-01
[ image compression , JPEG 2000 , Lossless compression , quality driven bit plane sequencer , size scalability , SNR scalability , video compression , WHDVI ]
Selective block size decision algorithm for intra prediction in video coding and learning website
195-202, 2011-08-11
[ H.264 , intra prediction , variable ]
A scalable parallel hardware architecture for connected component labeling
3753-3756, 2010-12-01
[ Connected component , Labeling algorithm , Real-time , Scalable architecture ]
Markov random field based background subtraction method for foreground detection under moving background scene
691-694, 2010-12-01
[ Background subtraction , Foreground detection , Markov random field , Visual surveillance ]
High level feature: Head and body co-trakcing by Kalman filter
725-728, 2010-12-01
[ Correspondence , Feature extraction , Kalman filter , Morphological , Shape , Tracking ]
Overlapped block-based adaptive bilateral motion estimation
572-575, 2010-12-01
[ adaptive bilateral motion estimation , bilateral motion estimation , frame rate up conversion , overlapped block estimation ]
A green computation H.264/AVC encoder with reconfigurable motion estimation
539-542, 2010-09-20
[ Edge informationl , Fast me algorithm , Power aware ]
A bandwidth-efficient embedded compression algorithm using two-level rate control scheme for video coding system
1149-1152, 2010-08-31
Design and integration for background subtraction and foreground tracking algorithm
181-184, 2009-12-01
A 1.4 MHz 0.21 mW MPEG-2/4 AAC single chip decoder
653-656, 2009-12-01
A conflict-free multi-symbol arithmetic encoder for H.264/AVC
290-293, 2009-12-01
Efficient bit-plane coding scheme for EBCOT algorithm in JPEG2000
330-333, 2009-12-01
[ Bit-plane , EBCOT , JPEG2000 , Pass predict ]
A 4x4-block level pipeline and bandwidth optimized motion compensation hardware design for H.264/AVC DECODER
1106-1109, 2009-11-20
The cycle-efficient IDCT algorithm for H.264/SVC with DSP platform
1114-1117, 2009-11-20
[ DSP platform , IDCT , Parallel processing , Scalable video coding ]
Two-stage method for specific audio retrieval based on MP3 compression domain
713-716, 2009-11-04
Data-aware platform realization of videotext extraction for content integration
726-729, 2009-10-26
Architecture design for a low-cost and low-complexity foreground object segmentation with multi-model background maintenance algorithm
3241-3244, 2009-01-01
[ Foreground object segmentation , Gaussian density function , Multi-model background maintenance ]
High efficiency architecture of fast block motion estimation with real-time QFHD on H.264 video coding
124-129, 2008-12-01
[ Fast block matching algorithm,H.264,High efficiency architecture,Motion estimation,QFHD ]
An efficient lossless embedded compression engine using compacted-FELICS algorithm
233-236, 2008-12-01
A high-speed lossless embedded compression codec for high-end LCD applications
185-188, 2008-12-01
Reconfigurable motion estimation architecture design on H.264/AVC for power aware mobile application
2008-12-01
[ Edge informationl , Fast me algorithm , Power aware ]
The bidirectional-based SRMC for hierarchical B frame in scalable video coding
807-810, 2008-12-01
Platform-based design for videotext regions filter system
737-741, 2008-12-01
A platform-based SoC design for a multi-standard audio decoder
758-761, 2008-12-01
Advertisement video completion using hierarchical model
1557-1560, 2008-10-23
[ Spatial-temporal consistency , Structure-texture completion , Video completion , Videotext removal ]
The segment-based rate control algorithm in JPEG-LS for bandwidth-efficiency applications
793-796, 2008-10-23
[ JPEG-LS , Rate control ]
A novel efficient VLSI architecture of 2-d discrete wavelet transform
647-650, 2008-10-22
[ Discrete wavelet transform , Lifting ]
An efficient CAVLD algorithm for H.264 Decoder
2008-09-23
An electronic system level design and performance evaluation for multimedia applications
621-624, 2008-09-22
Optimization techniques of AAC decoder on PACDSP VLIW processor
1468-1471, 2008-09-19
An efficient embedded compression algorithm using adjusted binary code method
2586-2589, 2008-09-19
Structural videotext regions completion with temporal-spatial consistency
256-261, 2008-09-09
[ Edge completion , Spatial-temporal consistency , Video completion , Videotext removal ]
A new auto-focus method based on focal window searching and tracking approach for digital camera
650-653, 2008-09-05
Design and implementation of a videotext extractor on dual-core platform
896-900, 2008-01-01
[ dsp optimization , Dual-core design , Videotext extraction ]
A novel design of CAVLC decoder with low power consideration
196-199, 2007-12-01
A cost-effective noise-reduction filtering structure based on unsymmetrical working windows
527-530, 2007-12-01
[ Impulse-noise ]
Error reduction on automatic segmentation in microarray image
76-81, 2007-12-01
[ Canny edge detection , Microarray image ]
Visual hand gesture segmentation using signer model for real-time human-computer interaction application
567-572, 2007-12-01
[ Hand segmentation , Hausdorff distance , Human-computer interaction , Model track , Motion analysis ]
A comprehensive motion videotext detection localization and extraction method
113-116, 2007-12-01
Fast motion estimation and edge information inter-mode decision on H.264 video coding
2007-12-01
[ Edge difference , Edge information mode decision , Fast mode decision , H.264 ]
A leading sign grouping with direct table lookup approach for AAC huffman decoding
91-95, 2007-12-01
Foreground object detection based on multi-model background maintenance
151-158, 2007-12-01
Complexity reduction of H.263 to H.264 transcoder with fast mode decision
1999-2002, 2007-01-01
Implementation of an efficient DWT using a FPGA on a real-time platform
2007-01-01
[ Discrete wavelet transform , Lifting ]
A hybrid CAVLD architecture design with low complexity and low power considerations
1910-1913, 2007-01-01
Progressive videotext regions inpainting based on edge detection and statistic method
614-618, 2006-12-01
[ Edge detection , Progressive processing , Region recovery , Video inpainting ]
Low complexity design on H.263 resolution downscaling using partial loop architecture
599-602, 2006-12-01
[ Downscaling , H.263 , Intra refresh , Partial Encode , Transcoding ]
Content-based retrieval of MP3 songs for one singer using quantization tree indexing and melody-line tracking method
2006-12-01
Low complexity architecture design of MDCT-based psychoacoustic model for MPEG 2/4 AAC encoder
141-144, 2006-12-01
Compressed domain content-based retrieval of MP3 audio example using quantization tree indexing and melody-line tracking method
5491-5494, 2006-12-01
Fast occluded object tracking technique with distance evaluation
2006-12-01
[ Distance , Occlusion , Power , Real time , Track ]
A novel, efficient architecture for the ID, lifting-based DWT with folded and pipelined schemes
2006-12-01
[ Discrete wavelet transform , Lifting ]
Low complexity motion refinement for DCT-domain video transcoder
524-527, 2006-12-01
A comprehensive motion videotext detection localization and extraction method
515-519, 2006-12-01
A digital watermark scheme using bits operation
345-346, 2005-12-05
Design and implementation of a FFT/IFFT soft IP generator for OFDM system
385-386, 2005-12-05
JPEG2000 encoder architecture design with Fast EBCOT algorithm
279-282, 2005-12-01
A 3D predict hexagon search algorithm for fast block motion estimation on H.264 video coding
658-661, 2005-12-01
Low power techniques for MP3 audio decoder using subband cut-off approach
268-271, 2005-12-01
A memory-reduced Log-MAP kernel for turbo decoder
1032-1035, 2005-12-01
A robust shot change detection method for content-based retrieval
4590-4593, 2005-12-01
Fast filterbanks for the low power MPEG high efficiency advanced audio coding decoder
1432-1437, 2005-12-01
An accelerated pshchoacoustic model chip design for MPEG 2/4 AAC audio
245-248, 2005-10-31
A VLSI design of new memory reduction turbo code decoder
249-252, 2005-10-31
SoC platform based design of MPEG-2/4 AAC audio decoder
2851-2854, 2005-01-01
Video segmentation using multiscale feature extraction and fusion
3223-3226, 2005-01-01
Content-based retrieval of audio example on MP3 compression domain
123-126, 2004-12-01
[ Content-based retrieval , Indexing , MP3 , Scale-factor , Sub-band ]
A new memory-reduced architecture design for log-MAP algorithm in turbo decoding
607-610, 2004-12-01
A low complexity channel estimation algorithm and architecture design in turbo codes with early termination techniques
213-216, 2004-12-01
Iterative decoding of Jpeg coded images with channel coding in bit-rate analysis
309-312, 2004-12-01
A novel predict hexagon search algorithm for fast block motion estimation on H.264 video coding
609-612, 2004-12-01
Web surveillance system using platform-based design
123-130, 2004-12-01
[ Embedded processor , Multimedia communication , Platform-based design ]
DSP platform-based JPEG2000 encoder with fast EBCOT algorithm
48-57, 2004-12-01
[ DSP , EBCOT , JPEG2000 , TriMedia TM-1300 ]
A low-power VLSI implementation for variable length decoder in MPEG-1 Layer III
30-39, 2004-12-01
[ Audio , Low power , MP3 , Variable length decoder , VLSI ]
Iterative approximation on source and channel coding for images transmission over noisy channels
214-217, 2004-12-01
A FFT/IFFT soft IP generator for OFDM communication system
241-244, 2004-12-01
[ FFT,IFFT,OFDM,Soft IP generator,Verilog HDL ]
Architecture design of MDCT-based psychoacoustic model co-processor in MPEG advanced audio coding
2004-09-07
Video error concealment techniques using progressive interpolation and boundary matching algorithm
2004-09-06
An implementation of configurable digital watermarking system in MPEG video encoder
216-217, 2003-08-18
An efficient binary motion estimation algorithm and its architecture for MEPG-4 shape coding
2003-07-14
Design of a low power psycho-acoustic model co-processor for MPEG-2/4 AAC LC stereo encoder
2003-07-14
A low power VLSI implementation for variable length decoder in MPEG-1 layer III
I133-I136, 2003-01-01
A pure-ASIC design approach for MPEG-2 AAC audio decoder
1633-1636, 2003-01-01
The hybrid video error concealment algorithm with low complexity approach
268-271, 2003-01-01
A high speed and low complexity integrated framework for JPEG2000
493-496, 2002-01-01
A high quality re-quantization/quantization method for MP3 and MPEG-4 AAC audio coding
2002-01-01
A novel architecture design for MP3 audio decoder
128-131, 2001-01-01
Adaptive network control scheme for region-based hybrid coding algorithm
174-177, 1998-01-01
Modified MPEG-2 audio decoding scheme based on it's low-cost fast algorithm and efficient data scheduling
1998-01-01
VLSI implementation of visual block pattern truncation coding
36-37, 1998-01-01
Low-cost architecture design with efficient data arrangement and memory configuration for MPEG-2 audio decoder
65-68, 1998-01-01
True color video signal processing system and its real-time chip implementation
238-239, 1997-12-01
Flexible high-throughput VLSI architecture with 2-D data-reuse for full-search motion estimation
144-147, 1997-12-01
Implementation strategy of MPEG-2 audio decoder and efficient multichannel architecture
293-300, 1997-12-01
System implementation of I-phone hardware by using low bit rate speech coding
489-499, 1997-12-01
Novel MPEG-2 audio decoder with efficient data arrangement and memory configuration
212-213, 1997-12-01
Novel scalable architecture with memory interleaving organization for full search block-matching algorithm
1229-1232, 1997-01-01
Design strategy for three-dimensional subband filter banks
605-608, 1996-12-01
Design and VLSI implementation of MPEG audio decoder
206-210, 1995-12-01

專書

Lecture Notes in Electrical Engineering
493-499, 2016-01-01
[ Discrete wavelet transform,IP,VerilogHDL ]
Lecture Notes in Electrical Engineering
257-262, 2016-01-01
[ ADC,Modulation,Sigma-delta ]
Applied Mechanics and Materials
508-512, 2014-01-01
[ Discrete wavelet transform,VerilogHDL,VLSI ]
Applied Mechanics and Materials
2463-2467, 2013-02-20
[ Architecture,Discrete wavelet transform,VLSI ]
Advanced Materials Research
569-572, 2012-01-01
[ Digital audio coding,Filterbank,MDCT,MPEG-2/4 AAC encoder ]
Lecture Notes in Electrical Engineering
217-224, 2011-08-11
[ motion estimation,motion vector,multi-direction,search pattern ]
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
120-126, 2002-01-01

校內獲獎

113 特聘教授
113 拔尖論文貢獻獎
112 研究傑出獎
112 傑出論文貢獻獎
111 研究傑出獎
110 研究傑出獎
109 研究傑出獎
108 研究傑出獎
107 研究傑出獎
106 研究傑出獎
105 研究傑出獎

期刊編輯

109 ~ 109 IEEE Sensors Journal ISSN 1530-437X EISSN 1558-1748
n/a

用於深度神經網路之邊緣優化增量學習方法與電腦系統 [中華民國]
深度學習網路裝置、其使用的記憶體存取方法與非揮發性儲存媒介 [中華民國]
產生手勢辨識模型之計算裝置與方法及手勢辨識裝置 [中華民國]
無損心電訊號壓縮系統 ECG signal lossless compression system and method for same [美國]
物件追蹤系統及方法 Object tracking system and method thereof [美國]
物件追蹤系統及方法 [中華民國]
無損心電訊號壓縮系統及方法 [中華民國]
音訊處理系統及方法 [中華民國]
AUDIO SIGNAL PROCESSING SYSTEM [美國]
Audio processing method and apparatus by utilizing a partition domain spreading function table stored in three linear arrays for reducing storag [美國]
影像處理方法 A high visual quality particle based frame rate up conversion algorithm [中華民國]
音訊處理方法以及裝置 [中華民國]
視訊穩定系統及其方法 Video Stabilization System and Method [中華民國]
影像處理裝置 Apparatus for Image Processing With Encoding Selection [中華民國]
多視點影像編解碼方法 MULTI-VIEW VIDEO CODING/DECODING METHOD [美國]
影像處理方法 IMAGE PROCESSING METHOD [中華民國]
視訊穩定系統及其方法 Video Stabilization System and Method [美國]
應用於多核心處理器之快速整數離散餘弦轉換方法 FAST INTEGER DCT METHOD ON MULTI-CORE PROCESSOR [中華民國]
實施於電子裝置之影像編碼方法 ELECTRICAL-DEVICE-IMPLEMENTED IMAGE CODING METHOD [中華民國]
影像處理方法 IMAGE PROCESSING METHOD [美國]
影像處理方法 A high visual quality particle based frame rate up conversion algorithm [美國]
影像處理裝置及其方法 Method for Image Processing With Encoding Selection [中華民國]
多視點影像編解碼方法 MULTI-VIEW VIDEO CODING/DECODING METHOD [中華民國]
用於數位視訊編輯系統之移動字幕移除方法 CAPTION REMOVAL METHOD FOR DIGITAL VIDEO EDITING SYSTEM [中華民國]
影像處理裝置及其方法 Method for Image Processing With Encoding Selection [美國]
實施於電子裝置之影像編碼方法 ELECTRICAL-DEVICE-IMPLEMENTED IMAGE CODING METHOD [美國]
影像處理裝置 Apparatus for Image Processing With Encoding Selection [美國]
用於數位視訊編輯系統之移動字幕移除方法 CAPTION REMOVAL METHOD FOR DIGITAL VIDEO EDITING SYSTEM [美國]
Method for Motion Search between Video Frames with Multiple Blocks [美國]
適用於多種音訊標準之可規劃共用的頻帶轉換處理單元及其處理方法CONFIGURABLE COMMON FILTERBANK PROCESSOR APPLICABLE FOR VARIOUS AUDIO STANDARDS AND PROCESSING METHOD THEREOF [中華民國]
適用於多種音訊標準之可規劃共用的頻帶轉換處理單元及其處理方法CONFIGURABLE COMMON FILTERBANK PROCESSOR APPLICABLE FOR VARIOUS AUDIO STANDARDS AND PROCESSING METHOD THEREOF [美國]
利用邊緣偵測處理解交錯核心之方法 Method for Interpolations after Edge Detections in De-Interlacing Process [美國]
利用邊緣偵測處理解交錯核心之方法 Method for Interpolations after Edge Detections in De-Interlacing Process [中華民國]
基於邊緣資訊之低複雜度視訊切割法 [中華民國]
運用於多種區塊組態之視訊畫面間動態搜尋的方法 Method for Motion Search between Video Pictures with Multiple Blocks [中華民國]
用於影像壓縮系統中之浮水印的嵌入與萃取的方法及其嵌入的硬體架構 WATERMARK EMBEDDING AND EXTRACTING METHOD AND EMBEDDING HARDWARE STRUCTURE USED IN IMAGE COMPRESSION SYSTEM [美國]
用於MPEG Layer3音頻訊號解碼中之逆修正型餘弦轉換及重疊相加之方法及裝置 INVERSE-MODIFIED DISCRETE COSINE TRANSFORM AND OVERLAP-ADD METHOD AND HARDWARE STRUCTURE FOR MPEG LAYER3 AUDIO SIGNAL DECODING [美國]
用於影像壓縮系統中之浮水印的嵌入與萃取的方法及其嵌入的硬體架構 WATERMARK EMBEDDING AND EXTRACTING METHOD AND EMBEDDING HARDWARE STRUCTURE USED IN IMAGE COMPRESSION SYSTEM [美國]
適用於JPEG2000中的EBCOT快速演算法和硬體架構裝置 A Fast Algorithm and Architecture Design for EBCOT in JPEG2000 [中華民國]
適用於音訊編/解碼之非線性運算方法及應用硬體 Nonlinear operation method suitable for audio encoding/decoding and hardware applying the same [美國]
適用於音訊編/解碼之非線性運算方法及應用硬體 NONLINEAR OPERATION METHOD SUITABLE FOR AUDIO ENCODING/DECODING AND HARDWARE APPLYING THE SAME [中華民國]
用於MPEG Layer3音頻訊號解碼中之逆修正型餘弦轉換及重疊相加之方法及裝置 INVERSE-MODIFIED DISCRETE COSINE TRANSFORM AND OVERLAP-ADD METHOD AND HARDWARE STRUCTURE FOR MPEG LAYER3 AUDIO SIGNAL DECODING [中華民國]
用於影像壓縮系統中之浮水印的嵌入與萃取的方法及其嵌入的硬體架構 WATERMARK EMBEDDING AND EXTRACTING METHOD AND EMBEDDING HARDWARE STRUCTURE USED IN IMAGE COMPRESSION SYSTEM [中華民國]

蔡宗漢

Tsai, Tsung-Han

現職

專長

專長簡述

最高學歷

相關連結

科技部學門領域

政府GRB研究專長領域

教育部學門領域

捐(受)贈收入

受贈收入-人工智慧系統晶片設計實驗室 1100101~1221231

其他補助

智慧電子整合人才培育計畫-4C電子聯盟中心104年度計畫 1040301~1050430

國科會計畫統計

適用於智慧眼鏡之邊緣運算之動態互動及視覺感知系統架構設計 1160801~1170731

適用於智慧眼鏡之邊緣運算之動態互動及視覺感知系統架構設計 1150801~1160731

適用於智慧眼鏡之邊緣運算之動態互動及視覺感知系統架構設計 1140801~1150731

智慧操控無人載具平台技術研發學研中心(4/4) 1130501~1140430 [水下無人載具 , UUV/USV]

運用人工智慧之深度估計於非平面投影技術開發及硬體架構設計 1120601~1130531 [深度估計、神經網路、硬體架構設計 , Depth Estimation,neural network,hardware architecture design]

智慧操控無人載具平台技術研發學研中心(3/4) 1120501~1130430 [水下無人載具 , UUV/USV]

智慧操控水下載具平台技術研發學研中心(2/4) 1110711~1120430 [水下無人載具 , UUV/USV]

輕量型神經網路晶圓缺陷偵測輔助系統 1090601~1100531 [強化資料分析,圓圖缺陷分類,神經網路,整合測試系統 , strengthen data analysis, wafer map defact classification, neural network, Integrated test system]

產學合作計畫-利用深度學習模型輔助晶片測試與除錯 1071101~1081031 [深度學習,遞歸神經網路,圖形處理器,深度壓縮 , Deep learning, Recurrent neural networks (RNN), Graphicprocessor unit (GPU), Deep compression]

應用於智慧城市環境輔助生活之影像偵知系統 1070801~1080731

嵌入視覺影像偵測之物聯網智慧家庭系統 1070101~1071231 [手勢辨識,行為辨識,嵌入式,軟硬整合 , Gesture identification,Activity Recognition,Embedded,hardware-software integration]

應用於智慧城市環境輔助生活之影像偵知系統 1060801~1070731

應用於智慧城市環境輔助生活之影像偵知系統 1050801~1060731

應用於智慧生活與照護之節能感測網路－總計畫暨子計畫一：結合物件 辨識與視訊壓縮之編解碼器與其人機互動平台(3/3) 1040501~1050731

產學合作計畫統計

多重矩陣硬體平行運算高效能電路設計(1/2) 1140101~1141231 [深度學習,物件偵測,高層次綜合,平行運算 , Deep Learning,Object Detection,High Level Synthesis,Parallel computing]

基於語音與唇語識別產生文字輔助聽障之系統 1120815~1130814 [唇語判讀 , lip reading]

產學合作計畫－運用人工智慧之深度估計於非平面投影技術開發及硬體 架構設計 1120601~1130531 [深度估計,神經網路,硬體架構設計 , Depth Estimation,neural network,hardware architecture design]

應用人工智慧於幀率提升之技術開發及硬體架構設計 1120101~1120630 [幀率提升,運動估計,神經網路,硬體架構設計 , Frame Rate Up-Conversion,Motion Estimation,neural network,hardware architecture design]

應用於MRI醫療影像清晰化之神經網路技術開發 1110601~1120731 [雜訊模糊,失焦模糊,晃動模糊 , Noise Blur,Defocus Blur,Motion Blur]

基於深度學習之人臉辨識與體溫檢測系統 1090801~1100731 [深度學習,人工智慧,嵌入式系統,溫度感測 , deep learning]

輕量型神經網路晶圓缺陷偵測輔助系統 1090601~1100531 [強化資料分析,圓圖缺陷分類,神經網路,整合測試系統 , strengthen data analysis,wafer map defact classification,neural network,Integrated test system]

情境調適裝置端模型演化演算法與晶片架構技術 1090101~1091231 [神經網路硬體加速器 , Neural network hardware accelerator]

2020臺灣消費電子國際研討會 1081203~1091231 [臺灣消費電子 , ICCE-TW]

基於物聯網和跌倒影像偵測之智慧照護警示服務：跌倒影像偵測與功能整合 1080301~1090630 [跌倒影像偵測 ]

利用深度學習模型輔助晶片測試與除錯 1071101~1081031 [深度學習,遞歸神經網路,圖形處理器,深度壓縮 , Deep learning, Recurrent neural networks (RNN), Graphicprocessor unit (GPU), Deep compression]

稻作蟲害監測和預警系統：飛蝨害蟲影像區分演算法的開發 1060101~1061231

結合影像鏡頭之人機互動系統 1050501~1071231

稻作蟲害監測和預警系統:飛蝨害蟲影像區分演算法的開發 1050101~1051231

期刊著作

Wafer map defect classification using deep learning framework with data augmentation on imbalance datasets Eurasip Journal on Image and Video Processing, 2025, 1, 2025-12-01 [ Data augmentation,G2LGAN,Generative adversarial network,Wafer map defect classification ]

An SoC-based CNN accelerator for face recognition using HWCK data scheduling Multimedia Systems, 31, 3, 2025-06-01 [ Deep learning,Deep neural network accelerator,Face recognition,Field-programmable gate array (FPGA),System-on-chip ]

An FPGA-Based Reconfigurable Convolutional Neural Network Accelerator for Tiny YOLO-V3 Circuits, Systems, and Signal Processing, 44, 5, 3388-3409, 2025-05-01 [ Convolutional neural network,FPGA,Reconfigurable hardware architecture,SoC design ]

Monocular-Based 3-D Human Pose Estimation With Refinement Block and Special Loss Function IEEE Sensors Journal, 25, 3, 5679-5687, 2025-01-01 [ 3-D human pose estimation (HPE),deep convolution neural network (CNN),root-relative 3-D human pose,volumetric heatmap ]

Monocular Depth Estimation by Non-Local Decoder-Squeeze-and-Excitation Network With Adaptive Depth List IEEE Open Journal of Intelligent Transportation Systems, 6, 1069-1083, 2025-01-01 [ CNNs,monocular depth estimation,non-local neural network,SE-Net,up-sampling recalibration ]

Design and implementation of deep learning-based object detection and tracking system Integration, the VLSI Journal, 99, 2024-11-01 [ DPU,FPGA,Object detection,Visual tracking,Vitis AI ]

FPGA-based control system for real-time driving of UHD Micro-LED display with color calibration Integration, the VLSI Journal, 98, 2024-09-01 [ Demura,FPGA,Micro-LED,Non-uniformity compensation,Real-time control,UHD video ]

GMM-Based Speaker Verification System with Hardware MFCC in SoC Design Multimedia Tools and Applications, 83, 19, 56991-57010, 2024-06-01 [ FPGA,Gaussian Mixture Model,Hidden Markov Model,Mel-frequency cepstral coefficients,Speaker verification ]

A High-Performance Neural Network SoC for End-to-End Speaker Verification IEEE Access, 12, 165482-165496, 2024-01-01 [ RISC-V,speaker identification,Speaker verification (SV),system-on-chip (SoC),x-vector ]

Hardware architecture design for real-time SIFT extraction with reduced memory usage Multimedia Tools and Applications, 83, 2, 6297-6317, 2024-01-01 [ Gaussian pyramid,Key-point,Low memory VLSI design,Object recognition,Real-time ]

A real-time surveillance system with multi-object tracking Multidimensional Systems and Signal Processing, 34, 4, 767-791, 2023-12-01 [ Background model,Background subtraction,Occlusion,Surveillance system,Tracking ]

Speech densely connected convolutional networks for small-footprint keyword spotting Multimedia Tools and Applications, 82, 25, 39119-39137, 2023-10-01 [ DenseNet,Depthwise separable convolution,Group convolution,Keyword spotting,SENet ]

DS-GAU: Dual-sequences gated attention unit architecture for text-independent speaker verification , 13, 2023-09-15 [ Attention mechanism,DNN,DS-GAU x-vectors,Speaker verification,TDNN,TDNN-GRU,x-vectors ]

A tracking system with multiple region background subtraction algorithm for night scene International Journal of Information Technology (Singapore), 15, 6, 3169-3179, 2023-08-01 [ Background modeling,Foreground detection,Night scene,Surveillance,Tracking ]

A one-shot face detection and recognition using deep learning method for access control system Signal, Image and Video Processing, 17, 4, 1571-1579, 2023-06-01 [ Artificial intelligence,Deep neural network,Face detection,Face recognition,Machine learning ]

BiSeNet V3: Bilateral segmentation network with coordinate attention for real-time semantic segmentation Neurocomputing, 532, 33-42, 2023-05-01 [ Deep learning,Real-time processing,Semantic segmentation ]

Learning with Sharing: An Edge-Optimized Incremental Learning Method for Deep Neural Networks IEEE Transactions on Emerging Topics in Computing, 11, 2, 461-473, 2023-04-01 [ deep neural networks,energy-efficient learning,Incremental learning,learning on-chip,network sharing ]

Joint Masked Face Recognition and Temperature Measurement System Using Convolutional Neural Networks Sensors, 23, 6, 2023-03-07 [ deep learning,embedded system,face detection,masked face recognition ]

An Efficient Incremental Learning Algorithm for Sound Classification IEEE Multimedia, 30, 1, 84-90, 2023-01-01

Hardware Architecture Design for Hand Gesture Recognition System on FPGA IEEE Access, 11, 51767-51776, 2023-01-01 [ attention model,depthwise separable convolution,field-programmable gate array (FPGA),Hand gesture recognition,hardware accelerator ]

An On-Chip Fully Connected Neural Network Training Hardware Accelerator Based on Brain Float Point and Sparsity Awareness IEEE Open Journal of Circuits and Systems, 4, 85-98, 2023-01-01 [ energy efficient,Fully connected layers,learning on edge,on-chip training,optimized memory access,sparsity ]

Automatic Optical Inspection System for Wire Color Sequence Detection Sensors, 22, 15, 2022-08-01 [ automated optical inspection,color recognition,computer vision,surveillance system ]

Refined U-net: A new semantic technique on hand segmentation Neurocomputing, 495, 1-10, 2022-07-21

A single-stage face detection and face recognition deep neural network based on feature pyramid and triplet loss IET Image Processing, 16, 8, 2148-2156, 2022-06-01

Hardware design for blind source separation using fast time-frequency mask technique Integration, the VLSI Journal, 82, 67-77, 2022-01-01

Design and implementation of filterbank for MPEG-2/4 AAC system Integration, the VLSI Journal, 82, 155-162, 2022-01-01

Architecture design and vlsi implementation of 3d hand gesture recognition system† Sensors, 21, 20, 2021-10-02 [ ASIC,FPGA,Hand gesture recognition,Object labeling,SAD matching,VLSI ]

Memory Access Optimization for On-Chip Transfer Learning IEEE Transactions on Circuits and Systems I: Regular Papers, 68, 4, 1507-1519, 2021-04-01 [ deep neural networks,fully connected layers,on-chip training,Optimized memory access,transfer learning ]

A robust tracking algorithm for a human-following mobile robot IET Image Processing, 15, 3, 786-796, 2021-02-01

Self-Defined Text-Dependent Wake-Up-Words Speaker Recognition System IEEE Access, 9, 138668-138676, 2021-01-01 [ customized wake-up word,Gaussian mixture model,hidden Markov model,mel-frequency cepstral coefficients,real-time operation,Speaker recognition ]

VLSI Implementation of Lossless ECG Compression Algorithm for Low Power Devices IEEE Transactions on Circuits and Systems II: Express Briefs, 67, 12, 3317-3321, 2020-12-01 [ adaptive linear prediction,ECG compression,Golomb rice coding,low power design,VLSI ]

A Light-Weight Neural Network for Wafer Map Classification Based on Data Augmentation IEEE Transactions on Semiconductor Manufacturing, 33, 4, 663-672, 2020-11-01 [ data augmentation,Deep learning,depthwise separable convolution,wafer defects ]

Efficient lossless compression scheme for multi-channel ECG signal processing Biomedical Signal Processing and Control, 59, 2020-05-01 [ Golomb-Rice codec,Linear prediction,Lossless compression,Multi-channel ECG signal,Telemedicine ]

Design of hand gesture recognition system for human-computer interaction Multimedia Tools and Applications, 79, 9-10, 5989-6007, 2020-03-01 [ Convex hull , Hand gesture recognition , Human-computer interaction , Labeling , Skin color segmentation ]

Design of vision-based indoor positioning based on embedded system IET Image Processing, 14, 3, 423-430, 2020-02-28

受贈收入-人工智慧系統晶片設計實驗室
1100101~1221231

智慧電子整合人才培育計畫-4C電子聯盟中心104年度計畫
1040301~1050430

適用於智慧眼鏡之邊緣運算之動態互動及視覺感知系統架構設計
1160801~1170731

適用於智慧眼鏡之邊緣運算之動態互動及視覺感知系統架構設計
1150801~1160731

適用於智慧眼鏡之邊緣運算之動態互動及視覺感知系統架構設計
1140801~1150731

智慧操控無人載具平台技術研發學研中心(4/4)
1130501~1140430
[水下無人載具 , UUV/USV]

運用人工智慧之深度估計於非平面投影技術開發及硬體架構設計
1120601~1130531
[深度估計、神經網路、硬體架構設計 , Depth Estimation,neural network,hardware architecture design]

智慧操控無人載具平台技術研發學研中心(3/4)
1120501~1130430
[水下無人載具 , UUV/USV]

智慧操控水下載具平台技術研發學研中心(2/4)
1110711~1120430
[水下無人載具 , UUV/USV]

輕量型神經網路晶圓缺陷偵測輔助系統
1090601~1100531
[強化資料分析,圓圖缺陷分類,神經網路,整合測試系統 , strengthen data analysis, wafer map defact classification, neural network, Integrated test system]

產學合作計畫-利用深度學習模型輔助晶片測試與除錯
1071101~1081031
[深度學習,遞歸神經網路,圖形處理器,深度壓縮 , Deep learning, Recurrent neural networks (RNN), Graphicprocessor unit (GPU), Deep compression]

應用於智慧城市環境輔助生活之影像偵知系統
1070801~1080731

嵌入視覺影像偵測之物聯網智慧家庭系統
1070101~1071231
[手勢辨識,行為辨識,嵌入式,軟硬整合 , Gesture identification,Activity Recognition,Embedded,hardware-software integration]

應用於智慧城市環境輔助生活之影像偵知系統
1060801~1070731

應用於智慧城市環境輔助生活之影像偵知系統
1050801~1060731

應用於智慧生活與照護之節能感測網路－總計畫暨子計畫一：結合物件辨識與視訊壓縮之編解碼器與其人機互動平台(3/3)
1040501~1050731

多重矩陣硬體平行運算高效能電路設計(1/2)
1140101~1141231
[深度學習,物件偵測,高層次綜合,平行運算 , Deep Learning,Object Detection,High Level Synthesis,Parallel computing]

基於語音與唇語識別產生文字輔助聽障之系統
1120815~1130814
[唇語判讀 , lip reading]

產學合作計畫－運用人工智慧之深度估計於非平面投影技術開發及硬體架構設計
1120601~1130531
[深度估計,神經網路,硬體架構設計 , Depth Estimation,neural network,hardware architecture design]

應用人工智慧於幀率提升之技術開發及硬體架構設計
1120101~1120630
[幀率提升,運動估計,神經網路,硬體架構設計 , Frame Rate Up-Conversion,Motion Estimation,neural network,hardware architecture design]

應用於MRI醫療影像清晰化之神經網路技術開發
1110601~1120731
[雜訊模糊,失焦模糊,晃動模糊 , Noise Blur,Defocus Blur,Motion Blur]

基於深度學習之人臉辨識與體溫檢測系統
1090801~1100731
[深度學習,人工智慧,嵌入式系統,溫度感測 , deep learning]

輕量型神經網路晶圓缺陷偵測輔助系統
1090601~1100531
[強化資料分析,圓圖缺陷分類,神經網路,整合測試系統 , strengthen data analysis,wafer map defact classification,neural network,Integrated test system]

情境調適裝置端模型演化演算法與晶片架構技術
1090101~1091231
[神經網路硬體加速器 , Neural network hardware accelerator]

2020臺灣消費電子國際研討會
1081203~1091231
[臺灣消費電子 , ICCE-TW]

基於物聯網和跌倒影像偵測之智慧照護警示服務：跌倒影像偵測與功能整合
1080301~1090630
[跌倒影像偵測 ]

利用深度學習模型輔助晶片測試與除錯
1071101~1081031
[深度學習,遞歸神經網路,圖形處理器,深度壓縮 , Deep learning, Recurrent neural networks (RNN), Graphicprocessor unit (GPU), Deep compression]

稻作蟲害監測和預警系統：飛蝨害蟲影像區分演算法的開發
1060101~1061231

結合影像鏡頭之人機互動系統
1050501~1071231

稻作蟲害監測和預警系統:飛蝨害蟲影像區分演算法的開發
1050101~1051231

Wafer map defect classification using deep learning framework with data augmentation on imbalance datasets
Eurasip Journal on Image and Video Processing, 2025, 1, 2025-12-01
[ Data augmentation,G2LGAN,Generative adversarial network,Wafer map defect classification ]

An SoC-based CNN accelerator for face recognition using HWCK data scheduling
Multimedia Systems, 31, 3, 2025-06-01
[ Deep learning,Deep neural network accelerator,Face recognition,Field-programmable gate array (FPGA),System-on-chip ]

An FPGA-Based Reconfigurable Convolutional Neural Network Accelerator for Tiny YOLO-V3
Circuits, Systems, and Signal Processing, 44, 5, 3388-3409, 2025-05-01
[ Convolutional neural network,FPGA,Reconfigurable hardware architecture,SoC design ]

Monocular-Based 3-D Human Pose Estimation With Refinement Block and Special Loss Function
IEEE Sensors Journal, 25, 3, 5679-5687, 2025-01-01
[ 3-D human pose estimation (HPE),deep convolution neural network (CNN),root-relative 3-D human pose,volumetric heatmap ]

Monocular Depth Estimation by Non-Local Decoder-Squeeze-and-Excitation Network With Adaptive Depth List
IEEE Open Journal of Intelligent Transportation Systems, 6, 1069-1083, 2025-01-01
[ CNNs,monocular depth estimation,non-local neural network,SE-Net,up-sampling recalibration ]

Design and implementation of deep learning-based object detection and tracking system
Integration, the VLSI Journal, 99, 2024-11-01
[ DPU,FPGA,Object detection,Visual tracking,Vitis AI ]

FPGA-based control system for real-time driving of UHD Micro-LED display with color calibration
Integration, the VLSI Journal, 98, 2024-09-01
[ Demura,FPGA,Micro-LED,Non-uniformity compensation,Real-time control,UHD video ]

GMM-Based Speaker Verification System with Hardware MFCC in SoC Design
Multimedia Tools and Applications, 83, 19, 56991-57010, 2024-06-01
[ FPGA,Gaussian Mixture Model,Hidden Markov Model,Mel-frequency cepstral coefficients,Speaker verification ]

A High-Performance Neural Network SoC for End-to-End Speaker Verification
IEEE Access, 12, 165482-165496, 2024-01-01
[ RISC-V,speaker identification,Speaker verification (SV),system-on-chip (SoC),x-vector ]

Hardware architecture design for real-time SIFT extraction with reduced memory usage
Multimedia Tools and Applications, 83, 2, 6297-6317, 2024-01-01
[ Gaussian pyramid,Key-point,Low memory VLSI design,Object recognition,Real-time ]

A real-time surveillance system with multi-object tracking
Multidimensional Systems and Signal Processing, 34, 4, 767-791, 2023-12-01
[ Background model,Background subtraction,Occlusion,Surveillance system,Tracking ]

Speech densely connected convolutional networks for small-footprint keyword spotting
Multimedia Tools and Applications, 82, 25, 39119-39137, 2023-10-01
[ DenseNet,Depthwise separable convolution,Group convolution,Keyword spotting,SENet ]

DS-GAU: Dual-sequences gated attention unit architecture for text-independent speaker verification
, 13, 2023-09-15
[ Attention mechanism,DNN,DS-GAU x-vectors,Speaker verification,TDNN,TDNN-GRU,x-vectors ]

A tracking system with multiple region background subtraction algorithm for night scene
International Journal of Information Technology (Singapore), 15, 6, 3169-3179, 2023-08-01
[ Background modeling,Foreground detection,Night scene,Surveillance,Tracking ]

A one-shot face detection and recognition using deep learning method for access control system
Signal, Image and Video Processing, 17, 4, 1571-1579, 2023-06-01
[ Artificial intelligence,Deep neural network,Face detection,Face recognition,Machine learning ]

BiSeNet V3: Bilateral segmentation network with coordinate attention for real-time semantic segmentation
Neurocomputing, 532, 33-42, 2023-05-01
[ Deep learning,Real-time processing,Semantic segmentation ]

Learning with Sharing: An Edge-Optimized Incremental Learning Method for Deep Neural Networks
IEEE Transactions on Emerging Topics in Computing, 11, 2, 461-473, 2023-04-01
[ deep neural networks,energy-efficient learning,Incremental learning,learning on-chip,network sharing ]

Joint Masked Face Recognition and Temperature Measurement System Using Convolutional Neural Networks
Sensors, 23, 6, 2023-03-07
[ deep learning,embedded system,face detection,masked face recognition ]

An Efficient Incremental Learning Algorithm for Sound Classification
IEEE Multimedia, 30, 1, 84-90, 2023-01-01

Hardware Architecture Design for Hand Gesture Recognition System on FPGA
IEEE Access, 11, 51767-51776, 2023-01-01
[ attention model,depthwise separable convolution,field-programmable gate array (FPGA),Hand gesture recognition,hardware accelerator ]

An On-Chip Fully Connected Neural Network Training Hardware Accelerator Based on Brain Float Point and Sparsity Awareness
IEEE Open Journal of Circuits and Systems, 4, 85-98, 2023-01-01
[ energy efficient,Fully connected layers,learning on edge,on-chip training,optimized memory access,sparsity ]

Automatic Optical Inspection System for Wire Color Sequence Detection
Sensors, 22, 15, 2022-08-01
[ automated optical inspection,color recognition,computer vision,surveillance system ]

Refined U-net: A new semantic technique on hand segmentation
Neurocomputing, 495, 1-10, 2022-07-21

A single-stage face detection and face recognition deep neural network based on feature pyramid and triplet loss
IET Image Processing, 16, 8, 2148-2156, 2022-06-01

Hardware design for blind source separation using fast time-frequency mask technique
Integration, the VLSI Journal, 82, 67-77, 2022-01-01

Design and implementation of filterbank for MPEG-2/4 AAC system
Integration, the VLSI Journal, 82, 155-162, 2022-01-01

Architecture design and vlsi implementation of 3d hand gesture recognition system†
Sensors, 21, 20, 2021-10-02
[ ASIC,FPGA,Hand gesture recognition,Object labeling,SAD matching,VLSI ]

Memory Access Optimization for On-Chip Transfer Learning
IEEE Transactions on Circuits and Systems I: Regular Papers, 68, 4, 1507-1519, 2021-04-01
[ deep neural networks,fully connected layers,on-chip training,Optimized memory access,transfer learning ]

A robust tracking algorithm for a human-following mobile robot
IET Image Processing, 15, 3, 786-796, 2021-02-01

Self-Defined Text-Dependent Wake-Up-Words Speaker Recognition System
IEEE Access, 9, 138668-138676, 2021-01-01
[ customized wake-up word,Gaussian mixture model,hidden Markov model,mel-frequency cepstral coefficients,real-time operation,Speaker recognition ]

VLSI Implementation of Lossless ECG Compression Algorithm for Low Power Devices
IEEE Transactions on Circuits and Systems II: Express Briefs, 67, 12, 3317-3321, 2020-12-01
[ adaptive linear prediction,ECG compression,Golomb rice coding,low power design,VLSI ]

A Light-Weight Neural Network for Wafer Map Classification Based on Data Augmentation
IEEE Transactions on Semiconductor Manufacturing, 33, 4, 663-672, 2020-11-01
[ data augmentation,Deep learning,depthwise separable convolution,wafer defects ]

Efficient lossless compression scheme for multi-channel ECG signal processing
Biomedical Signal Processing and Control, 59, 2020-05-01
[ Golomb-Rice codec,Linear prediction,Lossless compression,Multi-channel ECG signal,Telemedicine ]

Design of hand gesture recognition system for human-computer interaction
Multimedia Tools and Applications, 79, 9-10, 5989-6007, 2020-03-01
[ Convex hull , Hand gesture recognition , Human-computer interaction , Labeling , Skin color segmentation ]

Design of vision-based indoor positioning based on embedded system
IET Image Processing, 14, 3, 423-430, 2020-02-28

Design and Implementation on Intelligent Homecare Appliance System
IEEE Consumer Electronics Magazine, 9, 1, 16-21, 2020-01-01

Design of Wireless Vision Sensor Network for Smart Home
IEEE Access, 8, 60455-60467, 2020-01-01
[ Background segmentation , intelligent surveillance system , video surveillance system , wireless sensor network , wireless vision sensor network ]

Implementation of Fall Detection System Based on 3D Skeleton for Deep Learning Technique
IEEE Access, 7, 153049-153059, 2019-01-01
[ 3D skeleton , action recognition , deep learning , embedded system , fall detection , image processing ]

A novel method for 2D-to-3D video conversion based on boundary information
Eurasip Journal on Image and Video Processing, 2018, 1, 2018-12-01
[ 2D to 3D conversion , 3D video , Depth map , DIBR , Foreground segmentation , Superpixel ]

Single-Chip Design for Intelligent Surveillance System
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 26, 9, 1637-1646, 2018-09-01
[ Application-specified integrated circuit (ASIC) , foreground detection , object labeling , object tracking , smart camera ]

An Efficient ECG Lossless Compression System for Embedded Platforms with Telemedicine Applications
IEEE Access, 6, 42207-42215, 2018-07-21
[ Electro-cardiogram (ECG) , Golomb-Rice coding , healthcare monitoring , lossless data compression , telemedicine , wearable devices ]

Fast mode decision method based on edge feature for HEVC inter-prediction
IET Image Processing, 12, 5, 644-651, 2018-05-01

Hardware/software co-design and VLSI implementation for the intelligent surveillance system
IEEE Sensors Journal, 17, 18, 6077-6089, 2017-09-15
[ Foreground detection , object tracking , system-on-a-programmable-chip ]

A Hardware/Software Co-design of High Efficiency AAC Audio Decoder
Journal of Signal Processing Systems, 88, 3, 345-356, 2017-09-01
[ Audio compression , codec , HE-AAC , IP , low power , SOPC , VLSI ]

Monocular vision-based depth map extraction method for 2D to 3D video conversion
Eurasip Journal on Image and Video Processing, 2016, 1, 2016-12-01
[ 2D to 3D conversion , 3D video , Depth map , Foreground segmentation , Motion estimation ]

Accurate frame rate up-conversion for advanced visual quality
IEEE Transactions on Broadcasting, 62, 2, 426-435, 2016-06-01
[ bi-directional motion estimation , Frame rate up-conversion , noise minimization , unidirectional motion estimation ]

A SoC integrating ADC and 2DDWT for video/image processing
IEICE Transactions on Electronics, E99C, 3, 415-426, 2016-03-01
[ ADC , Discrete wavelet transform , Pipeline ]

WHDVI: A wireless high definition video interface technique for digital home
Integration, the VLSI Journal, 53, 138-144, 2016-03-01
[ Digital home , Embedded compression , Wireless transmission ]

Content-based singer classification on compressed domain audio data
Multimedia Tools and Applications, 74, 4, 1489-1509, 2014-01-01
[ GMM , MDCT , MFCC , MP3 ]

High efficiency architecture design of real-time QFHD for H.264/AVC fast block motion estimation
IEEE Transactions on Circuits and Systems for Video Technology, 21, 11, 1646-1658, 2011-11-01
[ Fast block matching algorithm , H264 , high efficiency architecture , motion estimation , QFHD ]